Datasheet
www.ti.com
2 EVM Overview
2.1 Features
3 Introduction
4 Analog Interface
EVM Overview
Data Sheets: Literature Number:
ADS8323 SBAS224
THS4031 SLOS224
SN74AHC138 SCLS258
SN74AHC245 SCLS230
SN74AHC541 SCLS261
• Full-featured evaluation board for the ADS8323 16-bit, 500-kHz, single-channel, parallel interface
analog-to-digital converter.
• Onboard signal conditioning
• Input and output digital buffers
• Onboard decoding for stacking multiple EVMs
The ADS8323EVM is a single-channel, analog-to-digital converter evaluation board based on the
ADS8323 16-bit, 500-kHz, parallel interface analog-to-digital converter (ADC). Typical power dissipation is
85 mW at a 500-kHz throughput rate and 5-V supply. The device uses a parallel interface.
The EVM incorporates an operational amplifier configured as buffer to ensure a low-noise input to the
ADC. This EVM also buffers all the digital input and output signals, effectively isolating the converter from
the parallel bus.
The ADS8323EVM Revision B has been redesigned to include a power connector and to allow for sharing
the parallel bus with another EVM. The parallel interface is therefore significantly changed from
ADS8323EVM Revision A.
The full-scale analog input range for the analog-to-digital (A/D) converter is from 0 V up to twice the
reference voltage. A buffer circuit is located between the analog inputs applied at connector J1 and the
converter input pins.
Connector J1 is the analog connector. The inverting analog input signal can be applied to pin 1 of
connector J1. The noninverting analog input signal should be shorted to pin 2 of connector J1. Jumper W4
selects the input source to the ADS8323 inverting input. It is factory-set to short across W4 pins 2-3 for
single-ended mode operation. This configuration applies the on-chip internal reference voltage to the
inverting input of the ADC, making the common-mode voltage 2.5 V. If W4 is shorted across pins 1-2, then
the inverting input channel is shorted through the buffer circuit from J1, pin 1.
Table 1. Analog Input Connector
Description Signal Name Connector.Pin# Signal Name Description
Inverting input (–) J1.1 J1.2 (+) Noninverting input
Reserved N/A J1.3 J1.4 N/A Reserved
Reserved N/A J1.5 J1.6 N/A Reserved
Reserved N/A J1.7 J1.8 N/A Reserved
ADS8323EVM 2 SLAU087A – July 2002 – Revised December 2004