Datasheet

ADS830
4
SBAS086A
TIMING DIAGRAM
SYMBOL DESCRIPTION MIN TYP MAX UNITS
t
CONV
Convert Clock Period 16.6 100µsns
t
L
Clock Pulse Low 7.3 8.3 ns
t
H
Clock Pulse High 7.3 8.3 ns
t
D
Aperture Delay 3 ns
t
1
Data Hold Time, C
L
= 0pF 3.9 ns
t
2
New Data Delay Time, C
L
= 15pF max 5.9 12 ns
4 Clock Cycles
Data Invalid
t
D
t
L
t
H
t
CONV
N–4N–3N–2N–1 N N+1 N+2 N+3
Data Out
Clock
Analog In
N
t
2
N+1
N+2
N+3
N+4
N+5
N+6
N+7
t
1
PIN CONFIGURATION
Top View SSOP
PIN DESIGNATOR DESCRIPTION
1 GND Ground
2 Bit 1 Data Bit 1 (D7) (MSB)
3 Bit 2 Data Bit 2 (D6)
4 Bit 3 Data Bit 3 (D5)
5 Bit 4 Data Bit 4 (D4)
6 Bit 5 Data Bit 5 (D3)
7 Bit 6 Data Bit 6 (D2)
8 Bit 7 Data Bit 7 (D1)
9 Bit 8 Data Bit 8 (D0) (LSB)
10 CLK Convert Clock
11 RSEL Input Range Select: HI = 2V; LO = 1V
12 INT/EXT Reference Select: HI = External; LO = Internal
13 REFB Bottom Reference
14 REFT Top Reference
15 CM Common-Mode Voltage Output
16 IN Complementary Input
17 IN Analog Input
18 GND Ground
19 +VS +5V Supply
20 VDRV Output Logic Drive Supply Voltage
PIN DESCRIPTIONS
GND
Bit 1 (MSB)
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8 (LSB)
CLK
VDRV
+V
S
GND
IN
IN
CM
REFT
REFB
INT/EXT
RSEL
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
ADS830