Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsData collecting ICsData acquisition IC - AD converter (ADC) External , Internal SSOP 20

8-Bit, 60MHz Sampling

ANALOG-TO-DIGITAL CONVERTER

FEATURES

● HIGH SNR: 49.5dB

● INTERNAL/EXTERNAL REFERENCE

OPTION

● SINGLE-ENDED OR

DIFFERENTIAL ANALOG INPUT

● PROGRAMMABLE INPUT RANGE:

1Vp-p /2Vp-p

● LOW POWER: 170mW

● LOW DNL: 0.2LSB

● SINGLE +5V SUPPLY OPERATION

● SSOP-20 PACKAGE

APPLICATIONS

● MEDICAL IMAGING

● VIDEO DIGITIZING

● COMMUNICATIONS

● DISK-DRIVE CONTROL

DESCRIPTION

The ADS830 is a pipeline, CMOS Analog-to-Digital (A/D)

converter that operates from a single +5V power supply.

This converter provides excellent performance with a single-

ended input and can be operated with a differential input

for added spurious performance. This high performance

converter includes an 8-bit quantizer, high bandwidth

track/hold, and a high accuracy internal reference. It also

allows for the user to disable the internal reference and

utilize external references. This external reference option

provides excellent gain and offset matching when used in

multi-channel applications or in applications where DC full

scale range adjustment is required.

The ADS830 employs digital error correction techniques to

provide excellent differential linearity for demanding im-

aging applications. Its low distortion and high SNR give

the extra margin needed for medical imaging, communica-

tions, video, and test instrumentation.

The ADS830 is specified at a maximum sampling fre-

quency of 60MHz and a single-ended input range of 1.5V

to 3.5V. The ADS830 is available in a SSOP-20 package

and is pin-for-pin compatible with the 8-bit, 80MHz ADS831.

ADS830

8-Bit

Pipelined

A/D Core

Internal

Reference

Optional External

Reference

Timing

Circuitry

Error

Correction

Logic

3-State

Outputs

T/H

CLK VDRV

ADS830

Int/Ext

•

INV

(Opt)

ADS830

SBAS086A – APRIL 2001

www.ti.com

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Summary of content (15 pages)

PAGE 1
ADS830 AD S83 0 ¤ SBAS086A – APRIL 2001 8-Bit, 60MHz Sampling ANALOG-TO-DIGITAL CONVERTER TM FEATURES DESCRIPTION ● HIGH SNR: 49.5dB ● INTERNAL /EXTERNAL REFERENCE OPTION ● SINGLE-ENDED OR DIFFERENTIAL ANALOG INPUT ● PROGRAMMABLE INPUT RANGE: 1Vp-p /2Vp-p ● LOW POWER: 170mW ● LOW DNL: 0.2LSB ● SINGLE +5V SUPPLY OPERATION ● SSOP-20 PACKAGE The ADS830 is a pipeline, CMOS Analog-to-Digital (A/D) converter that operates from a single +5V power supply.
PAGE 2
ELECTROSTATIC DISCHARGE SENSITIVITY ABSOLUTE MAXIMUM RATINGS +VS ....................................................................................................... +6V Analog Input ............................................................. –0.3V to (+VS + 0.3V) Logic Input ............................................................... –0.3V to (+VS + 0.3V) Case Temperature ......................................................................... +100°C Junction Temperature ........................
PAGE 3
ELECTRICAL CHARACTERISTICS (Cont.) At TA = full specified temperature range, single-ended input range = 1.5V to 3.5V, sampling rate = 60MHz, and external reference, unless otherwise noted. ADS830E PARAMETER DIGITAL INPUTS Logic Family Convert Command High Level Input Current(5) (VIN = 5V) Low Level Input Current (VIN = 0V) High Level Input Voltage Low Level Input Voltage Input Capacitance DIGITAL OUTPUTS Logic Family Logic Coding Low Output Voltage (IOL = 50µA) Low Output Voltage, (IOL = 1.
PAGE 4
PIN DESCRIPTIONS PIN CONFIGURATION Top View SSOP GND 1 20 VDRV Bit 1 (MSB) 2 19 +VS Bit 2 3 18 GND Bit 3 4 17 IN Bit 4 5 16 IN Bit 5 6 15 CM Bit 6 7 14 REFT Bit 7 8 13 REFB Bit 8 (LSB) 9 12 INT/EXT CLK 10 11 RSEL ADS830 PIN DESIGNATOR 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 GND Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 Bit 8 CLK RSEL INT/EXT REFB REFT CM IN IN GND +VS VDRV DESCRIPTION Ground Data Bit 1 (D7) (MSB) Data Bit 2 (D6) Data Bit 3 (D5) Data
PAGE 5
TYPICAL CHARACTERISTICS At TA = full specified temperature range, single-ended input range = 1.5V to 3.5V, sampling rate = 60MHz, and external reference, unless otherwise noted. SPECTRAL PERFORMANCE SPECTRAL PERFORMANCE 0 0 fIN = 1MHz SNR = 49dBFS SFDR = 67dBFS –10 –20 Magnitude (dB) Magnitude (dB) –20 –30 –40 –50 –60 –30 –40 –50 –60 –70 –70 –80 –80 –90 –90 0 7.5 15 22.5 0 30 7.5 22.
PAGE 6
TYPICAL CHARACTERISTICS (Cont.) At TA = full specified temperature range, single-ended input range = 1.5V to 3.5V, sampling rate = 60MHz, and external reference, unless otherwise noted. INTEGRAL LINEARITY ERROR DIFFERENTIAL LINEARITY ERROR 1.0 0.2 fIN = 1MHz fIN = 20MHz 0.5 ILE (LSB) DLE (LSB) 0.1 0 0 –0.5 –0.1 –1.0 –0.
PAGE 7
APPLICATION INFORMATION THEORY OF OPERATION The ADS830 is a high-speed CMOS A/D converter which employs a pipelined converter architecture consisting of 6 internal stages. Each stage feeds its data into the digital error correction logic ensuring excellent differential linearity and no missing codes at the 8-bit level. The output data becomes valid on the rising clock edge (see Timing Diagram). The pipeline architecture results in a data latency of 4 clock cycles.
PAGE 8
1kΩ +5V VCM = +2.5VDC 1kΩ +5V 0.1µF REFB +2.0V RS 39Ω VIN REFT +3.0V RSEL +VS IN OPA681 47pF +VIN 0V ADS830 RF 402Ω –VIN CM IN RG 402Ω 0.1µF INT/EXT 0.1µF GND FIGURE 2. AC-Coupled Input Configuration for a 2Vp-p Full-Scale Range and a Common-Mode Voltage, VCM, at +2.5V Derived from the Internal Top (REFT) and Bottom Reference (REFB). The OPA680 can be used in place of the OPA681 if a voltage feedback amplifier is preferred. +5V 1kΩ +5V RS 24.9Ω VIN REFT +3.0V 0.
PAGE 9
+5V RF 499Ω RIN 499Ω VIN 1/2 OPA2681 +VS RSEL RS 39Ω IN 2Vp-p 47pF ADS830 NOTE: RF = RIN, G = –1 CM (+2.5V) IN +5V 0.1µF REFB (+2.0V) REFT (+3.0V) INT/EXT 50Ω R2 301Ω 0.1µF 1/2 OPA2681 VCM = +1.25V 0.1µF R1 499Ω RF 1kΩ FIGURE 4. DC-Coupled Interface Circuit with Dual Current-Feedback Amplifier OPA2681. The OPA2680 can be used in place of the OPA2681 if a voltage feedback amplifier is preferred.
PAGE 10
the resistive reference ladder. The bandgap reference circuit includes logic functions that allow to set the analog input swing of the ADS830 to either a 1Vp-p or 2Vp-p full-scale range simply by tying the RSEL pin to a LOW or HIGH potential, respectively. While operating the ADS830 in the external reference mode, the buffer amplifiers for REFT and REFB are disconnected from the reference ladder.
PAGE 11
lower CMV as it increases the signal headroom of the driving amplifier. The internal reference ladder has a nominal impedance of 800Ω. Depending on the selected reference voltages, the required drive current will vary accordingly and the external reference circuitry should be designed to supply the maximum required current. DIGITAL INPUTS AND OUTPUTS Clock Input Requirements Clock jitter is critical to the SNR performance of high speed, high resolution Analog to Digital Converters.
PAGE 12
PACKAGE OPTION ADDENDUM www.ti.
PAGE 13
PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device ADS830E/2K5 Package Package Pins Type Drawing SSOP DBQ 20 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 16.4 Pack Materials-Page 1 6.5 B0 (mm) K0 (mm) P1 (mm) 9.0 2.1 8.0 W Pin1 (mm) Quadrant 16.
PAGE 14
PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ADS830E/2K5 SSOP DBQ 20 2500 367.0 367.0 38.
PAGE 15
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.