Datasheet

ADS805
4
SBAS073B
www.ti.com
6 Clock Cycles
Data Invalid
t
D
t
L
t
H
t
CONV
N – 6N – 5N – 4N – 3N – 2N – 1 N N + 1
Data Out
Clock
Analog In
N
t
2
N + 1
N + 2
N + 3
N + 4
N + 5
N + 6
N + 7
t
1
PIN CONFIGURATION
PIN DESIGNATOR DESCRIPTION
1 OVR Over-Range Indicator
2 B1 Data Bit 1 (D11) (MSB)
3 B2 Data Bit 2 (D10)
4 B3 Data Bit 3 (D9)
5 B4 Data Bit 4 (D8)
6 B5 Data Bit 5 (D7)
7 B6 Data Bit 6 (D6)
8 B7 Data Bit 7 (D5)
9 B8 Data Bit 8 (D4)
10 B9 Data Bit 9 (D3)
11 B10 Data Bit 10 (D2)
12 B11 Data Bit 11 (D1)
13 B12 Data Bit 12 (D0) (LSB)
14 CLK Convert Clock Input
15 OE Output Enable. H = High Impedance State.
L = LOW or floating, normal operation
(internal pull-down resistor).
16 +V
S
+5V Supply
17 GND Ground
18 SEL Input Range Select
19 V
REF
Reference Voltage Select
20 REFB Bottom Reference
21 CM Common-Mode Voltage
22 REFT Top Reference
23 IN Complementary Analog Input
24 GND Ground
25 IN Analog Input (+)
26 GND Ground
27 +V
S
+5V Supply
28 VDRV Output Driver Voltage
PIN DESCRIPTIONS
TIMING DIAGRAM
SYMBOL DESCRIPTION MIN TYP MAX UNITS
t
CONV
Convert Clock Period 50 100µsns
t
L
Clock Pulse LOW 24 25 ns
t
H
Clock Pulse HIGH 24 25 ns
t
D
Aperture Delay 3 ns
t
1
Data Hold Time, C
L
= 0pF 3.9 ns
t
2
New Data Delay Time, C
L
= 15pF max 12 ns
Top View SSOP
OVR
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
CLK
VDRV
+V
S
GND
IN
GND
IN
REFT
CM
REFB
V
REF
SEL
GND
+V
S
OE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
ADS805