Datasheet

ADS803
8
SBAS074B
www.ti.com
FIGURE 2. DC-Coupled, Single-Ended Input Configuration with DC-Level Shift.
An advantage of ac-coupling is that the driving amplifier still
operates with a ground-based signal swing. This will keep the
distortion performance at its optimum since the signal swing
stays within the linear region of the op amp and sufficient
headroom to the supply rails can be maintained. Consider
using the inverting gain configuration to eliminate CMR in-
duced errors of the amplifier. The addition of a small series
resistor (R
S
) between the output of the op amp and the input
of the ADS803 will be beneficial in almost all interface configu-
rations. This will decouple the op amp’s output from the
capacitive load and avoid gain peaking, which can result in
increased noise. For best spurious and distortion performance,
the resistor value should be kept below 50Ω. Furthermore, the
series resistor together with the 100pF capacitor, establish a
passive low-pass filter, limiting the bandwidth for the wideband
noise thus help improving the SNR performance.
DC-COUPLED WITHOUT LEVEL SHIFT
In some applications the analog input signal may already be
biased at a level which complies with the selected input
range and reference level of the ADS803. In this case, it is
only necessary to provide an adequately low source imped-
ance to the selected input, IN or
IN . Always consider wideband
op amps, since their output impedance will stay low over a
wide range of frequencies. For those applications requiring
the driving amplifier to provide a signal amplification (with a
gain ≥ 3), consider using the decompensated voltage-feed-
back op amp OPA643.
DC-COUPLED WITH LEVEL SHIFT
Several applications may require that the bandwidth of the
signal path includes DC, in which case the signal has to be
DC-coupled to the A/D converter. In order to accomplish
this, the interface circuit has to provide a DC-level shift. The
circuit presented in Figure 2 employs an op amp, A1, to sum
the ground centered input signal with a required DC offset.
OPA691
V
IN
+V
S
2Vp-p
0
+1V
–1V
R
F
R
IN
NOTE: R
F
= R
IN
, G = –1
+V
S
ADS803
R
S
24.9Ω
2kΩ
100pF
10µF
+
+2.5V
R
2
R
1
2kΩ
IN
IN
REFB
(+1V)
V
REF
SEL
REFT
0.1µF
0.1µF
The ADS803 typically operates with a +2.5V common-mode
voltage, which is established at the center tap of the ladder
and connected to the
IN input of the converter. Amplifier A1
operates in inverting configuration. Here, resistors R
1
and
R
2
set the DC bias level for A1. Due to the op amp’s noise
gain of +2V/V (assuming R
F
= R
IN
), the DC offset voltage
applied to its noninverting input has to be divided down to
+1.25V, resulting in a DC output voltage of +2.5V.
DC voltage differences between the IN and
IN inputs of the
ADS803 will effectively produce an offset, which can be
corrected for by adjusting the values of resistors R
1
and R
2
.
The bias current of the op amp may also result in an
undesired offset. The selection criteria of the appropriate op
amp should include the input bias current, output voltage
swing, distortion, and noise specification. Note that in this
example the overall signal phase is inverted. To re-estab-
lish the original signal polarity it is always possible to
interchange the IN and
IN connections.
SINGLE-ENDED-TO-DIFFERENTIAL
CONFIGURATION (TRANSFORMER COUPLED)
In order to select the best suited interface circuit for the
ADS803, the performance requirements must be known. If
an ac-coupled input is needed for a particular application, the
next step is to determine the method of applying the signal;
either single-ended or differentially. The differential input
configuration may provide a noticeable advantage of achiev-
ing good SFDR performance based on the fact that in the
differential mode, the signal swing can be reduced to half of
the swing required for single-ended drive. Secondly, by
driving the ADS803 differentially, the even-order harmonics
will be reduced. See Figure 3 for the schematic of the
suggested transformer coupled interface circuit. The resistor
across the secondary side (R
T
) should be set to get an input
impedance match (e.g., R
T
= n
2
• R
G
).