Datasheet

ADS8028EVM Hardware Details

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3.2 Digital Control

The SPI digital control signals are applied directly to the J-DIGITAL header on the ADS8028EVM. When

using the ADS8028EVM-PDK (the combination of the ADS8028EVM, MMB0 motherboard, and ADCPro

software), these signals are supplied by the MMB0 motherboard through J4. If the ADS8028EVM is

instead evaluated as a stand-alone board, these signals must be supplied by another microcontroller or

processor according to the timing characteristics in the ADS8028 data sheet.

Figure 5 shows the schematic connections to the J-DIGITAL header. The CS signal can be routed to J-

DIGITAL.1 or J-DIGITAL.7 (default) through the J-CS jumper. Ensure that the J-CS jumper is positioned to

route CS to J-DIGITAL.7 (short pins J-CS.1-2) for proper SPI communication when using the

ADS8028EVM-PDK. Additionally, the S1 push-button switch allows the user to manually reset and power-

down the ADS8028 and OPA836 op amps on the ADS8028EVM while the button is held. When the button

is released, the ADS8028 powers up with default conditions.

Figure 5. Digital Interface Header Schematic

NOTE: By default, the J-CS jumper on the ADS8028EVM is shorted between pins J-CS.1-2. This

setting is required for proper SPI communication between the MMB0 motherboard and the

ADS8028.

ADS8028EVM-PDK SBAU198–April 2012

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