Datasheet
1/10/2012
C
4
A
B
C
D
Date
E
Sheet
of
F
4
2
1
Title
3
1
A
B
C
D
E
Size
Number
F
2
Filename
Drawn by
3
Engineer
Rev
1
<Number>
ADS8028_A.sch
1
Texas Instruments
ADS8028 EVM Schematic
Christopher Hall
June 27, 2011
A
Christopher Hall
(NOT A PIN)
Thermal PAD
Signal
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
CNTL
GPIO0
CLKX
DGND
CLKR
GPIO1
FSX
GPIO2
FSR
DGND
DX
GPIO3
DR
GPIO4
*INT
SCL
TOUT
DGND
GPIO5
SDA
Digital Connector
Connect analog &
NOTES:
EEPROM
Digital Interface
Short ADC's
AGND & BGND
Reference
Reference Selector
+1.8V Logic
+3.3V Logic
+5V Logic
Power Connector
Power
Signal
Pin #
1
2
3
4
5
6
7
8
9
10
+VA
-VA
+5VA
-5VA
DGND
AGND
+1.8VD
VD1
+3.3VD
+5VD
BVDD Selector
/CS Selector
Optional Filter
Edge Damping
(optional)
digital grounds
Signal
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
AGND
A0+
AGND
A1+
AGND
A2+
AGND
A3+
AGND
A4+
AGND
A5+
AGND
A6+
VCOM
A7+
AGND
REF-
AGND
REF+
Analog Connector
Ground unused channels with
jumper to avoiding floating inputs
Analog Inputs
Single-Ended Input
0.1V* -> +2.5V
Bipolar Input
-2V -> +2V
SMA Input
GPIO0
CNTL
FSX
REF5025
INT/EXT
* Limited by op amp output swing
Selecting "INT/EXT":
- Outputs internal reference or
- Inputs an external reference
0.25V -> +2.25V
Remove R10 and connect ammeter
Remove R20and connect ammeter
to measure analog power consumption
to measure digital power consumption
(MMB0 uses "FSX" for "/CS")
R1
47
R2
47
R3
47
R4
47
R5
47
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
J-DIGITAL
1
2
3
J-CS
1
AIN3
2
AIN4
3
AIN5
4
AIN6
5
AIN7
6
AGND
7
REF
8
NC
9
DGND
10
AVDD
11
CS
12
TM_BUSY
13
DIN
14
DOUT
15
SCLK
16
DVDD
17
PD-RST
18
AIN0
19
AIN1
20
AIN2
21
GND
U1
ADS8028RTJ
C2 1u
R20
0
R210
C1
1u
C3
1u
1
A0
2
A1
3
A2
4
VSS
5
SDA
6
SCL
7
WP
8
VCC
U5
24AA256-I/ST
RE2
NI
RE1 0
1
DNC
2
VIN
3
TEMP
4
GND
5
TRIM
6
VOUT
7
NC
8
DNC
U4
REF5025AID
C12
1u
C13
1u
C14
10u
R18 1
21
J-5
21
J-1
21
J-3
C5
10u
R19 0
C15
NI
RE3
2.7k
RE4
2.7k
1
2
3
J-REF
C4
10u
R6
10k
1
2
3
4
5
6
7
8
9
10
J-POWER
RIN2
0
CIN2
NI
RIN6
0
CIN6
NI
RIN5
0
CIN5
NI
RIN4
0
CIN4
NI
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
J-ANALOG
RIN3
0
CIN3
NI
R9
0
RIN024.9
CIN0
430p
3
+
4
-
1
OUT
2
VS-
6
VS+
5
PD
U2
OPA836IDBV
AIN0
R14
1k
R15
2k
RIN1
24.9
CIN1
430p
R13
2k
3
+
4
-
1
OUT
2
VS-
6
VS+
5
PD
U3
OPA836IDBV
AIN1
C7
0.1u
C10
0.1u
S1
SW_FSM4JSMA
J-SMA
RS0
0
RS1
NI
VREF
C11
NI
R17
0
R12
0
C8
NI
R10
NI
C6
NI
C9
47p
R11
NI
R16
NI
R8 100
R7 100
RIN7
0
CIN7
NI
DOUT
TM_BUSY
/CS
/CS
SCLK
DIN
DIN
DOUT
/PD_/RST
SCLK
TM_BUSY
AIN0
AIN1
AIN2
AIN6
AIN5
AIN4
AIN3
BVDD
AVDD
BVDD
EXT_REF
AVDD
AVDD
VREF
VREF
BVDD
AIN7
SCL
SDA
SCL
SDA
/PD_/RST
BVDD
EXT_REF
/PD_/RST
AVDD
AIN0
/PD_/RST
AVDD
AIN1
AIN6
AIN5
AIN4
AIN3
AIN2
AIN7
AVDD
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Schematics and Bill of Materials
5.2 Schematic
15
SBAU198–April 2012 ADS8028EVM-PDK
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