Datasheet

R
SOURCE
Signal
Source
C
BYPASS
R
5W
1
AINxP
AINxN
ADS7947
ADS7948
ADS7949
+VA
AVDD
GND
ADS7947
ADS7948
ADS7949
SLAS708 –SEPTEMBER 2010 www.ti.com
DRIVING AN ADC WITHOUT A DRIVING OP AMP
There are some low input signal bandwidth applications, such as battery power monitoring or mains monitoring.
For these applications, it is not required to operate an ADC at high sampling rates and it is desirable to avoid
using a driving op amp from a cost perspective. In this case, the ADC input sees the impedance of the signal
source (such as a battery or mains transformer). This section elaborates the effects of source impedance on
sampling frequency.
Equation 1 can be rewritten as Equation 4:
Sampling Time = Filter Time Constant × Settling Resolution × ln(2) (4)
As shown in Figure 53, it is recommended to use a bypass capacitor across the positive and negative ADC input
terminals.
Figure 53. Driving an ADC Without a Driving Op Amp
Source impedance (R
SOURCE
+ R
1
) with (C
BYPASS
+ C
SAMPLE
) acts as a low-pass filter with Equation 5:
Filter Time Constant = (R
SOURCE
+ R
1
) × (C
BYPASS
+ C
SAMPLE
)
Where:
C
SAMPLE
is the internal sampling capacitance of the ADC (equal to 32pF). (5)
Table 1 lists the recommended bypass capacitor values and the filter time constant for different source
resistances. It is recommended to use a 10pF bypass capacitor, at minimum.
Table 1. Filter Time Constant versus Source Resistance
APPROXIMATE C
BYPASS
FILTER TIME
R
SOURCE
(Ω) R
SOURCE
+ R
1
(pF) C
BYPASS
+ C
SAMPLE
(pF) CONSTANT (ns)
15 20 370 400 8
25 30 235 267 8
50 55 115 145 8
100 105 44 76 8
180 185 10 43.2 8
250 255 10 42 10.7
1000 1005 10 42 42.2
5000 5005 10 42 210.2
Typically, settling resolution is selected as (ADC resolution + 2). For the ADS7947 (12-bit) the ideal settling
resolution is 14. Using equations Equation 2 and Equation 3, the sampling time can be easily determined for a
given source impedance. This allows 80ns of sampling time for a 12-bit ADC with 8ns of filter time constant,
which matches the ADS7947 specifications. For source impedance above 180Ω, the filter time constant
continues to increase beyond the 8ns required for an 80ns sampling time. This increases the minimum
permissible sampling time for 12-bit settling and the device must be operated at a lower sampling rate.
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