Datasheet

AVDD

GND

REF

REFGND

ADS7945

ADS7946

REF50xx

(1)

AVDD

AGND

1 Fm

Ceramic

ADS7945

ADS7946

SBAS539B –JUNE 2011– REVISED SEPTEMBER 2011

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REFERENCE

The ADS7945/6 use an external reference voltage during the conversion of a sampled signal. The devices switch

the capacitors used in the conversion process to the reference terminal during conversion. The switching

frequency is the same as the SCLK frequency. It is necessary to decouple the REF terminal to REFGND with a 1

µF ceramic capacitor in order to get the best noise performance from the device. The capacitor must be placed

closest to these pins. The reference input can be driven with the REF50xx series precision references from TI.

Figure 78 shows a typical reference driving circuit.

Sometimes it is convenient to use AVDD as a reference. The ADS7945/6 allow reference ranges up to AVDD.

However, make sure that AVDD is well-bypassed and that there is a separate bypass capacitor between REF

and REFGND.

(1) Select the appropriate device as described by the required reference value. For example, select the REF5040 for a 4 V reference, the

REF5030 for a 3 V reference, and the REF5025 for a 2.5 V reference. Ensure that (AVDD – REF) > 0.2 V so that the REF50xx functions

properly.

Figure 78. Typical Reference Driving Circuit

CLOCK

The ADS7945/6 use SCLK for conversions (typically 40 MHz). A lower frequency SCLK can be used for

applications that require sample rates less than 2 MSPS. However, it is better to use a 40 MHz SCLK and slow

down the device speed by choosing a lower frequency for CS, which allows more acquisition time. This

configuration relaxes constraints on the output impedance of the driving circuit. Refer to the Application

Information section for calculation of the driving circuit output impedance.

Product Folder Link(s): ADS7945 ADS7946