Datasheet
RESET
INT
SCLK
SDA
CH0
CH1
CH2
CH3
1
2
3
4
12
11
10
9
DVDD
16
A0
5
AVDD
15
DGND
6
ADCIN
14
PWRCON
7
MUXOUT
13
AGND
8
Thermal
Pad
(1)
ADS7924
SBAS482A –JANUARY 2010–REVISED MAY 2010
www.ti.com
PIN CONFIGURATION
RTE PACKAGE
QFN-16
(TOP VIEW)
(1) Connect to AGND.
TERMINAL FUNCTIONS
PIN
NUMBER NAME FUNCTION DESCRIPTION
1 RESET Digital input External reset, active low
2 INT Digital output Interrupt pin, active low; generated when input voltage is beyond programmed threshold
3 SCLK Digital input Serial clock input
Digital
4 SDA Serial data
input/output
5 A0 Digital input I
2
C address selection
6 DGND Digital Digital ground
7 PWRCON Digital output Power control pin to control shutdown/power-up of external op amp
8 AGND Analog Analog ground
9 CH3 Analog input Input channel 3
10 CH2 Analog input Input channel 2
11 CH1 Analog input Input channel 1
12 CH0 Analog input Input channel 0
13 MUXOUT Analog output Multiplexer output
14 ADCIN Analog input ADC input
15 AVDD Analog Analog supply
16 DVDD Digital Digital supply
4 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): ADS7924