Datasheet

Frame1SlaveAddressByte Frame2PointerAddressByte
1
StartBy
Master
ACKBy
ADS7924
ACKBy
ADS7924
Frame5RegisterDataByte2 Frame6RegisterDataByteN
StartBy
Master
ACKBy
Master
NACKBy
Master
(2)
From
ADS7924
1 9 1
9
1 9 1
9
SDA
SCL
0 0 1 R/W
1
(2)
0 0 P4
(3)
P3 P2 P1 P0
¼
SDA
(Continued)
SCL
(Continued)
D7 D6 D5 D4
0 A0
(1)
D3
D7 D6 D5 D4 D3 D2 D1 D0
RepeatedStart
By Master
0
D2 D1 D0
StartBy
Master
ACKBy
ADS7924
ACKBy
Master
(2)
From
ADS7924
1 9 1
9
SDA
(Continued)
SCL
(Continued)
1 0 0 1
0
A0
(1)
R/W
D7 D6 D5 D4 D3 D2 D1 D0
0
Frame3SlaveAddressByte
Frame4DataByte1
From
ADS7924
1
Stop
By Master
ADS7924
www.ti.com SBAS482A –JANUARY 2010–REVISED MAY 2010
(1) The value of A0 is determined by the A0 pin.
(2) When INC is set to '1', the address pointer automatically increments for multiple register reads.
(3) Bits P[4:0] point to the register to be read.
Figure 34. Reading Multiple Registers Timing Diagram
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