Datasheet

ADS7924

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SBAS482A –JANUARY 2010–REVISED MAY 2010

SLPCONFIG: Sleep Configuration Register (Address = 13h)

7 6 5 4 3 2 1 0

0 CONVCTRL SLPDIV4 SLPMULT8 0 SLPTIME2 SLPTIME1 SLPTIME0

Bit 7 Always write '0'

Bit 6 CONVCTRL: Conversion control

This bit determines the conversion status after a conversion control event; see the INTCNFG bits in the INTCONFIG

0 = Conversions continue, independent of the control event status (default)

1 = Conversions are stopped as soon as a control event occurs; the event must be cleared to resume conversions

Bit 5 SLPDIV4: Sleep time 4x divider

This bit sets the speed of the sleep clock.

0 = Sleep time divider is '1' (default)

1 = Sleep time divider is '4'

Bit 4 SLPMULT8: Sleep time 8x multiplier

0 = Sleep time multiplier is '1' (default)

1 = Sleep time multiplier is '8'

Bit 3 Always write '0'

Bits[2:0] SLPTIME[2:0]: Sleep time setting

000 = 2.5ms (default)

001 = 5ms

010 = 10ms

011 = 20ms

100 = 40ms

101 = 80ms

110 = 160ms

111 = 320ms

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