Datasheet
ADS7924
SBAS482A –JANUARY 2010–REVISED MAY 2010
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REGISTER MAP
The ADS7924 operation is controlled through a set of registers. Collectively, the registers contain all the
information needed to configure the part. Table 3 shows the register map.
Table 3. Register Map
RESET
ADDRESS REGISTER BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
VALUE
00h MODECNTRL 00h MODE5 MODE4 MODE3 MODE2 MODE1 MODE0 SEL/ID1 SEL/ID0
01h INTCNTRL X0h ALRM_ST3 ALRM_ST2 ALRM_ST1 ALRM_ST0 AEN/ST3 AEN/ST2 AEN/ST1 AEN/ST0
02h DATA0_U XXh DATA0[11] DATA0[10] DATA0[9] DATA0[8] DATA0[7] DATA0[6] DATA0[5] DATA0[4]
03h DATA0_L XXh DATA0[3] DATA0[2] DATA0[1] DATA0[0] 0 0 0 0
04h DATA1_U XXh DATA1[11] DATA1[10] DATA1[9] DATA1[8] DATA1[7] DATA1[6] DATA1[5] DATA1[4]
05h DATA1_L XXh DATA1[3] DATA1[2] DATA1[1] DATA1[0] 0 0 0 0
06h DATA2_U XXh DATA2[11] DATA2[10] DATA2[9] DATA2[8] DATA2[7] DATA2[6] DATA2[5] DATA2[4]
07h DATA2_L XXh DATA2[3] DATA2[2] DATA2[1] DATA2[0] 0 0 0 0
08h DATA3_U XXh DATA3[11] DATA3[10] DATA3[9] DATA3[8] DATA3[7] DATA3[6] DATA3[5] DATA3[4]
09h DATA3_L XXh DATA3[3] DATA3[2] DATA3[1] DATA3[0] 0 0 0 0
0Ah ULR0 XXh ULR0[7] ULR0[6] ULR0[5] ULR0[4] ULR0[3] ULR0[2] ULR0[1] ULR0[0]
0Bh LLR0 XXh LLR0[7] LLR0[6] LLR0[5] LLR0[4] LLR0[3] LLR0[2] LLR0[1] LLR0[0]
0Ch ULR1 XXh ULR1[7] ULR1[6] ULR1[5] ULR1[4] ULR1[3] ULR1[2] ULR1[1] ULR1[0]
0Dh LLR1 XXh LLR1[7] LLR1[6] LLR1[5] LLR1[4] LLR1[3] LLR1[2] LLR1[1] LLR1[0]
0Eh ULR2 XXh ULR2[7] ULR2[6] ULR2[5] ULR2[4] ULR2[3] ULR2[2] ULR2[1] ULR2[0]
0Fh LLR2 XXh LLR2[7] LLR2[6] LLR2[5] LLR2[4] LLR2[3] LLR2[2] LLR2[1] LLR2[0]
10h ULR3 XXh ULR3[7] ULR3[6] ULR3[5] ULR3[4] ULR3[3] ULR3[2] ULR3[1] ULR3[0]
11h LLR3 XXh LLR3[7] LLR3[6] LLR3[5] LLR3[4] LLR3[3] LLR3[2] LLR3[1] LLR3[0]
12h INTCONFIG E0h AIMCNT2 AIMCNT1 AIMCNT0 INTCNFG1 INTCNFG0 BUSY/INT INTPOL INTTRIG
13h SLPCONFIG 00h 0 CONVCTRL SLPDIV4 SLPMULT8 0 SLPTIME2 SLPTIME1 SLPTIME0
14h ACQCONFIG 00h 0 0 0 ACQTIME4 ACQTIME3 ACQTIME2 ACQTIME1 ACQTIME0
15h PWRCONFIG 00h CALCNTL PWRCONPOL PWRCONEN PWRUPTIME4 PWRUPTIME3 PWRUPTIME2 PWRUPTIME1 PWRUPTIME0
18h
(A0 = 0)
16h RESET RST/ID7 RST/ID6 RST/ID5 RST/ID4 RST/ID3 RST/ID2 RST/ID1 RST/ID0
19h
(A0 = 1)
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