Datasheet

Awake
Aquireand
Convert
Channel
First
Aquireand
Convert
Channel
Second
Aquireand
Convert
Channel
Third
Aquireand
Convert
Channel
Fourth
SelectedChannel(First)
NextChannel NextChannel NextChannel NextChannel
Sleep
FirstChannel
Status
Busy
(1)
PWRCON
(2)
InputMultiplexer
Aquireand
Convert First
Channel
Aquireand
Convert Second
Channel
t
ACQ CONV
+t
t
SLEEP
t
PU
t
ACQ CONV
+t
t
ACQ CONV
+t
t
ACQ CONV
+t
t
ACQ CONV
+t
t
ACQ CONV
+t
Awake
t
PU
t
CYCLE
(3)
ADS7924
www.ti.com SBAS482A –JANUARY 2010–REVISED MAY 2010
Auto-Burst Scan with Sleep Mode
PWRCON output is always disabled. Data from the
conversions are always put into the data register that
This mode automatically converts all the channels
corresponds to a particular channel. For example,
without delay followed by a sleep interval before the
CH2 data always goes in register DATA2_H and
cycle repeats, as shown in Figure 29. After the ADC
DATA2_L regardless of conversion order.
Mode Control register is written, the power-up time
(t
PU
) is allowed to elapse. This value can be set to '0'
This mode can be used with the onboard digital
to effectively bypass if not needed. Before the first
comparator to periodically monitor the status of the
conversion of the selected input, an acquisition time
input signals while saving power between
(t
ACQ
) is allowed to elapse. t
ACQ
time is programmable
conversions. Little support is needed from a host
through the ACQCONFIG register, bits[4:0].
microcontroller. It is suggested to interrupt this mode
Afterwards, all four inputs are measured without
and stop the automatic conversions, either by setting
delay. The input multiplexer is automatically
the mode to Idle or configuring the alarm to do so,
incremented as the conversions complete. If, for
before retrieving data. The length in time of the cycle
example, the initial selected channel is CH2, the
(t
CYCLE
) sets the average power, as shown in Figure 3
conversion order is CH2, CH3, CH0, and CH1. After
or Figure 4.
the four conversions, a sleep time (t
SLEEP
) is allowed
to elapse and then the cycle repeats. The length of
the sleep time is controlled by register bits. During the
sleep mode, power dissipation is minimal and the
(1) Busy is an internal signal shown as active high that can be routed to the INT pin for external monitoring.
(2) PWRCON is shown enabled and active high.
(3) The mode begins on the trailing edge of the I
2
C acknowledge after writing to the MODECNTL register.
Figure 29. Auto-Burst Scan with Sleep Operation Example
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