Datasheet

ADS7886
SLAS492A –SEPTEMBER 2005–REVISED NOVEMBER 2009 www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
+V
DD
= 2.35 V to 5.25 V, T
A
= –40°C to 125°C, f
(sample)
= 1 MHz (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
DD
= 2.35 V to 3.6 V, f
I
= 100 kHz 69 71.25
SINAD Signal-to-noise and distortion dB
V
DD
= 4.75 V to 5.25 V, f
I
= 100 kHz 70 72.25
THD Total harmonic distortion
(5)
f
I
= 100 kHz –84 dB
SFDR Spurious free dynamic range f
I
= 100 kHz 85.5 dB
Full power bandwidth At –3 dB 15 MHz
DIGITAL INPUT/OUTPUT
Logic family — CMOS
V
DD
= 2.35 V to 3.6 V 1.8 5.25
V
IH
High-level input voltage V
V
DD
= 3.6 V to 5.25 V 2.4 5.25
V
DD
= 5 V 0.8
V
IL
Low-level input voltage V
V
DD
= 3 V 0.4
V
OH
High-level output voltage I
(source)
= 200 µA V
DD
–0.2
V
V
OL
Low-level output voltage I
(sink)
= 200 µA 0.4
POWER SUPPLY REQUIREMENTS
+V
DD
Supply voltage 2.35 3.3 5.25 V
V
DD
= 2.35 V to 3.6 V, 1-MHz 1.3 1.5
throughput
V
DD
= 4.75 V to 5.25 V, 1-MHz
1.5 2
Supply current (normal mode) mA
throughput
V
DD
= 2.35 V to 3.6 V, static state 1.1
V
DD
= 4.75 V to 5.25 V, static state 1.5
SCLK off 1
Power down state supply current µA
SCLK on (20 MHz) 200
V
DD
= 3 V 3.9 4.5
Power dissipation at 1-MHz throughput mW
V
DD
= 5 V 7.5 10
V
DD
= 3 V 3.3
Power dissipation in static state mW
V
DD
= 5 V 7.5
Power up time 0.1 µs
Invalid conversions after
1
power up or reset
(5) Calculated on the first nine harmonics of the input frequency.
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