Datasheet

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SLAS370C − APRIL 2002 − REVISED OCTOBER 2004
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6
PIN ASSIGNMENTS
SSOP-28 PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
LN0
LN1
LN2
LN3
LN4
LN5
LN6
LN7
RESET
RISE/FALL
I/O0
I/O1
I/O2
I/O3
BUFOUT/REFIN
BUFIN
VREF
GND
V
DD
CS
DOUT
DIN
SCLK
CCLK
OSC ENABLE
BUSY
CONVERT
GND
Terminal Functions
TERMINAL
NO. NAME
I/O DESCRIPTION
1−8 LN0−LN7 AI MUX input lines 0−7
9 RESET DI Master reset, zeros all registers
10 RISE/FALL DI Sets the active edge for SCLK. 0 sets SCLK active on falling edge. 1 sets SCLK active on rising edge.
11−14 I/O0−I/O3 DIO Digital input or output signal
15 GND − Connect to ground. (This pin is grounded internally on the ADS7871. It has a weak pulldown on the
ADS7870).
16 CONVERT DI 0 to 1 transition starts a conversion cycle.
17 BUSY DO 1 indicates converter is busy
18 OSC ENABLE DI 0 sets CCLK as an input, 1 sets CCLK as an output and turns the oscillator on.
19 CCLK DIO If OSC ENABLE = 1, then the internal oscillator is output to this pin. If OSC ENABLE = 0, then this is the input
pin for an external conversion clock.
20 SCLK DI Serial data input/output transfer clock. Active edge set by the RISE/FALL pin. If RISE/FALL is low, SCLK is
active on the falling edge.
21 DIN DIO Serial data input. In the 3-wire mode, this pin is used for serial data input. In the 2-wire mode, serial data
output appears on this pin as well as the DOUT pin.
22 DOUT DO Serial data output. This pin is driven when CS is low and is high impedance when CS is high. This pin
behaves the same in both 3-wire and 2-wire modes.
23 CS DI Chip select. When CS is low, the serial interface is enabled. When CS is high, the serial interface is disabled,
the DOUT pin is high impedance, and the DIN pin is an input. The CS pin only affects the operation of the
serial interface. It does not directly enable/disable the operation of the signal conversion process.
24 V
DD
− Power supply voltage, 2.7 V to 5.5 V
25 GND − Power supply ground
26 VREF AO 2.048-/2.5-V on-chip voltage reference
27 BUFIN AI Input to reference buffer amplifier
28 BUFOUT/REFIN AIO Output from reference buffer amplifier and reference input to ADC