Datasheet

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SLAS370C − APRIL 2002 − REVISED OCTOBER 2004
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37
APPLICATION INFORMATION
REQUIRED SUPPORT ELEMENTS
As with any precision analog integrated circuit, good power supply bypassing is required. A low ESR ceramic
capacitor in parallel with a large value electrolytic capacitor across the supply line furnishes the required
performance. Typical values are 0.1 µF and 10 µF respectively. Noise performance of the internal voltage
reference circuit is improved if a ceramic capacitor of approximately 0.01 µF is connected from VREF to ground.
Increasing the value of this capacitor may bring slight improvement in the noise on VREF but increases the time
required to stabilize after turn on.
If the internal buffer amplifier is used, it must have an output filter capacitor connected to ground to ensure
stability. A nominal value of 0.47 µF provides the best performance. Any value between 0.1 µF and 10 µF is
acceptable. In installations where one ADS7871 buffer is used to drive several devices, an additional filter
capacitor of 0.1 µF should be installed at each of the slave devices.
The circuit in Figure 43 shows a typical installation with all control functions under control of the host embedded
controller. The SCLK is active on the falling edge. If the internal voltage reference and oscillator are used, they
must be turned on by setting the corresponding control bits in the device registers. These registers must be
set on power up and after any reset operation.
18
19
16
17
26
27
28
15
RESET
RISE/FALL
CS
SCLK
DIN
DOUT
OSC_CTRL
CCLK
CONVERT
BUSY
VREF
BUFIN
BUFOUT/REFIN
GND
VDD
GND
D100
D101
D102
D103
LN0
LN1
LN2
LN3
LN4
LN5
LN6
LN7
23
20
21
22
24
25
11
12
13
14
1
2
3
4
5
6
7
8
ADS7871
V
DD
Digital I/O − 4 Lines
Analog In − 8 Lines
0.01 µF
0.47 µF
0.01 µF 10 µF
Serial Interface
Figure 43. Typical Operation with Recommended Capacitor Values