Datasheet

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SBAS124C − DECEMBER 1999 − REVISED DECEMBER 2005
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20
Multiplexer Addressing
The last four bits in the instruction byte (during a start conversion instruction) or the Gain/Mux register (ADDR
= 4) assign the multiplexer configuration for the requested conversion. The input channels may be placed in
either differential or single-ended configurations. For differential configurations, the polarity of the input signal
is reversible by the state of M2 (Bit D2). In single-ended mode, all input channels are measured with respect
to system ground (pin 25). Figure 20 shows some examples of multiplexer assignments and Figure 21 provides
the coding for the input channel selection.
EXAMPLES OF MULTIPLEXER OPTIONS
LN0, LN1
Channel
4 Differential
LN2, LN3
LN4, LN5
LN6, LN7
LN0, LN1
LN2, LN3
LN0
+
+
+
+
+
+
+
+
+
–
+
–
–
+
–
+
+
–
–
+
+
+
+
+
Channel
8 Single−Ended
LN4
Channel
Differential and
Single−Ended
LN1
LN2
LN3
LN4
LN5
LN6
LN7
LN5
LN6
LN7
Figure 20. Examples of Multiplexer Options
CODING FOR DIFFERENTIAL INPUT CHANNEL SELECT
CODING FOR SINGLE-ENDED INPUT CHANNEL SELECT
(negative input is ground)
SELECTION BITS INPUT LINES SELECTION BITS INPUT LINES
M3 M2 M1 M0 LN0 LN1 LN2 LN3 LN4 LN5 LN6 LN7 M3 M2 M1 M0 LN0 NL1 LN2 LN3 LN4 LN5 LN6 LN7
0 0 0 0 + − 1 0 0 0 +
0 0 0 1 + − 1 0 0 1 +
0 0 1 0 + − 1 0 1 0 +
0 0 1 1 + − 1 0 1 1 +
0 1 0 0 − + 1 1 0 0 +
0 1 0 1 − + 1 1 0 1 +
0 1 1 0 − + 1 1 1 0 +
0 1 1 1 − + 1 1 1 1 +
NOTE:
Bit M3 selects either differential or single-ended mode. If differential mode is selected, bit M2 determines the polarity of the input channels.
Bold items are power-up default conditions.
Figure 21. Multiplexer Addressing