Datasheet
SBAS124C − DECEMBER 1999 − REVISED DECEMBER 2005
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10
OVERVIEW
The ADS7870 is a complete data acquisition device composed of an input analog multiplexer (MUX), a
programmable gain amplifier (PGA) and an analog-to-digital (A/D) converter. Four lines of digital input/output
(I/O) are also provided. Additional circuitry provides support functions including conversion clock, voltage
reference, and serial interface for control and data retrieval.
Control and configuration of the ADS7870 are accomplished by command bytes written to internal registers
through the serial port. Command register device control includes MUX channel selection, PGA gain, A/D start
conversion command, and I/O line control. Command register configuration control includes internal voltage
reference setting and oscillator control.
Operational modes and selected functions can be activated by digital inputs at corresponding pins. Pin settable
configuration options include SCLK active-edge selection, master reset, and internal oscillator clock enable.
The ADS7870 has eight analog signal input pins, LN0 through LN7. These pins are connected to a network of
analog switches (the MUX). The inputs can be configured as 8 single-ended or 4 differential inputs, or some
combination.
The four general-purpose digital I/O pins (I/O3 through I/O0) can be made to function individually as either digital
inputs or digital outputs. These pins give the user access to four digital I/O pins through the serial interface
without having to run additional wires to the host controller.
The programmable gain amplifier (PGA) provides gains of 1, 2, 4, 5, 8, 10, 16, and 20 V/V.
The 12-bit A/D converter in the ADS7870 is a successive approximation type. The default output of the
converter is 2s complement format and can be read in a variety of ways depending on the program
configuration.
The ADS7870 internal voltage reference can be software configured for output voltages of 1.15 V, 2.048 V, or
2.5 V. The reference circuit is trimmed for high initial accuracy and low temperature drift. A separate buffer
amplifier is provided to buffer the high impedance VREF output.
The voltage reference, PGA, and A/D converter use the conversion clock (CCLK) and signals derived from it.
CCLK can be either an input or output signal. The ADS7870 can divide the CCLK signal by a constant before
it is applied to the A/D converter and PGA. This allows a higher frequency system clock to be used to control
the A/D converter operation. Division factors (DF) of 1, 2, 4, and 8 are available. The signal that is actually
applied to the PGA and A/D converter is DCLK, where DCLK = CCLK/DF.
The ADS7870 is designed so that its serial interface can be conveniently used with a wide variety of
microcontrollers. It has four conventional serial interface pins: SCLK (serial data clock), DOUT (serial data out),
DIN (serial data in, which may be set bidirectional in some applications), and CS (chip select function).
The ADS7870 has ten internal user accessible registers which are used in normal operation to configure and
control the device (summarized in Figure 15).