Datasheet

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SBAS253E − MAY 2003 − REVISED JULY 2006
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3.8 Digital Counter Modules
The interface of the ADS7869 for the analog position sensors has the following features:
• Up to 16MHz operation frequency
• Error-safe state machine for fully four-quadrant decoding
• High noise immunity:
− Differential signal inputs
− Analog input comparators with hysteresis
− Schmitt trigger digital inputs
• Digital Noise Filter
• 16-bit binary Up/Down counters with over- and under-flow detection
• Synchronous to the system clock
• Asynchronous and synchronous latching of the counter values at the same time as the ADC values are sampled
and held
• Five shadow registers
A1
CNTA1
A1p
A1n
B1p
B1n
B1
CNTB1
Digital Filter
FiltA1
State Machine
FiltB1
EDGE
16−Bit
Binary Counters
16−Bit
Registers
HOLD2
HOLD1
CLK
U/D
Figure 1−23. Block Diagram of a Counter Module
3.8.1 Operation
Analog position sensors have two signals on the output, sine and cosine. Both signals are differential and
positioned at 90 electrical degrees to each other. The sign comparators, with typically 75mV hysteresis,
process the position sensor output differential signal. This dramatically reduces the common-mode noise,
which is present in motor control applications. The digital output signal from the comparator is connected to
the counter input. Extra noise suppression is obtained with Schmitt trigger inputs. The digital signals are
carried through a programmable digital filter. The filtered, glitch-free signals are processed by a state machine,
which increments or decrements the counters. The counter values are then latched into corresponding
registers by the synchronous or asynchronous hold signals HOLD1
and HOLD2.
There is a counter module implemented for each pair of position sensor signals (A1, B1 and A2, B2). These
counters can count upwards or downwards, depending on the direction of the position sensor signal (that is,
the phase difference of the signals A1 and B1, respectively, or A2 and B2). These counter values are stored
in shadow registers when the ADC channels are sampled and held. The four position sensor channels and
the counter values are all sampled at the same time on the HOLD1
or HOLD2 signal.
With a 16MHz system clock, the maximum data rate that the counters will operate at is 2MHz.