Datasheet

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SBAS253E − MAY 2003 − REVISED JULY 2006
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45
3.6.11 Comparator Test Register (25
H
)
The purpose of the Comparator Test Register, in address 25
H
, is to apply a defined pattern to the comparator
output pins. This feature is for testing algorithms in the DSP or testing the hardware controlled by the
comparator outputs. To enable the comparator test, the enable part of the register must contain the value 0C
H
.
This register should not be used in normal operation. By reading the Comparator Test register, the
comparator outputs are sent back in order to allow the host to read the actual comparator outputs in one cycle.
The format of the output word is shown in Table 1−23.
Table 1−23. Comparator Test Register
RW0
RW0 RW0 RW0 RW0 RW0 RW− RW− RW− RW− RW− RW− RW− RW− RW− RW−
E5 E4 E3 E2 E1 E0 A1/B2 B1 A2 B2/A1 UC VC WC UI VI WI
bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
Bit 15−10: E5−0: Input channel address bits
000000 = Disable COMPARATOR_TEST
...
001011 = Disable COMPARATOR_TEST
001100 = Enable COMPARATOR_TEST write procedure
001101 = Disable COMPARATOR_TEST
...
111111 = Disable COMPARATOR_TEST
Bit 9: A1: Control bit of position sensor, sign comparator A1 output
1 = Comparator output A1, set HIGH
0 = Comparator output A1, set LOW
By reading this bit, comparator output B2 is read
Bit 8: B1: Control bit of position sensor, sign comparator B1 output
1 = Comparator output B1, set HIGH
0 = Comparator output B1, set LOW
Bit 7: A2: Control bit of position sensor, sign comparator A2 output
1 = Comparator output A2, set HIGH
0 = Comparator output A2, set LOW
Bit 6: B2: Control bit of position sensor, sign comparator B2 output
1 = Comparator output B2, set HIGH
0 = Comparator output B2, set LOW
By reading this bit, comparator output A1 is read
Bit 5: UC: Control bit phase U current sign comparator
1 = Comparator output U_COMP, set HIGH
0 = Comparator output U_COMP, set LOW
Bit 4: VC: Control bit phase V current sign comparator
1 = Comparator output V_COMP, set HIGH
0 = Comparator output V_COMP, set LOW
Bit 3: WC: Control bit phase W current sign comparator
1 = Comparator output W_COMP, set HIGH
0 = Comparator output W_COMP, set HIGH
Bit 2: UI: Control bit phase U current window comparator
1 = Comparator output U_ILIM, set HIGH
0 = Comparator output U_ILIM, set LOW
Bit 1: VI: Control bit phase V current window comparator
1 = Comparator output V_ILIM, set HIGH
0 = Comparator output V_ILIM, set LOW
Bit 0: WI: Control bit phase W current window comparator
1 = Comparator output W_ILIM, set HIGH
0 = Comparator output W_ILIM, set LOW