Datasheet

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SBAS253E − MAY 2003 − REVISED JULY 2006
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25
The Gain Select portion (bits GAIN [1..0]) determines the programmable gain of the ADIN word; see
Table 1−5. The gain for all three ADCs is set by one gain input parameter. The gain values and allowable
full-scale inputs are shown in Table 1−4.
The gain setting and input voltage range for the channels AN1, AN2, and AN3 at ADC3 are always 1.0V/V
with respect to ±2.5V.
Table 1−5. 13-bit VECANA ADIN Word Format
D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
DAC7 DAC6 DAC5 DAC4 DAC3 DAC2 DAC1 DAC0 GAIN1 GAIN0 IN2 IN1 IN0
3.2.1 Input Channel Selection
Table 1−6 shows the relationships between the value of the input select bits and the input channels that are
converted.
Table 1−6. Controls for Input Multiplexers and Sample Holds
INPUT SELECT, BITS 2−0 ANALOG SIGNAL CONNECTED TO ADC
X
HEX CODE BINARY CODE ADC
1
ADC
2
ADC
3
0
H
000 — — — — AN3 SH
5
1
H
001 AX SH
6
BX SH
7
AN3 SH
5
2
H
010 A2 SH
1
B2 SH
3
AN2 SH
5
3
H
011 A2 SH
2
B2 SH
4
AN2 SH
5
4
H
100 A1 SH
1
B1 SH
3
AN1 SH
5
5
H
101 A1 SH
1
B1 SH
3
AN1 SH
5
6
H
110 A1 SH
1
B1 SH
3
AN1 SH
5
7
H
111 IU SH
1
IV SH
3
IW SH
5
Input Select = 0
H
The synchronous sample-and-hold, SH
5
, samples AN3 (only), then ADC3 converts it on the signal HOLD1.
Input Select = 1
H
AX is sampled by the asynchronous sample-and-hold, SH
6,
with the signal HOLD2; ADC1 converts it on the
signal HOLD1
. BX is sampled by the asynchronous sample-and-hold, SH
7,
with the signal HOLD2; ADC2
converts it on the signal HOLD1
. AN3 is sampled by the synchronous sample-and-hold, SH
5,
then ADC3
converts it on the signal HOLD1
.
The signal HOLD2
must be low during the entire conversion. If HOLD2 is high before a conversion starts,
ADC
1
and ADC
2
will not convert.
Input Select = 2
H
A2 is sampled by the synchronous sample-and-hold, SH
1
; ADC
1
converts it on the signal HOLD1. B2 is
sampled by the synchronous sample-and-hold, SH
3
; ADC
2
converts it on the signal HOLD1. AN2 is sampled
by the synchronous sample-and-hold, SH
5
; ADC
3
converts it on the signal HOLD1.
Input Select = 3
H
A2 is converted by ADC
1
on the signal HOLD1. A2 is sampled on SH
2
in a preceding conversion with Input
Select 4
H
, 5
H
, or 6
H
. B2 is converted by ADC
2
on the signal HOLD1. B2 is sampled on SH
4
in a preceding
conversion with Input Select 4
H
, 5
H
, or 6
H
. AN2 is sampled by the synchronous sample-and-hold, SH
5
; ADC
3
converts it on the signal HOLD1.
Input Select = 4
H
, 5
H
and 6
H
A1 is sampled by the synchronous sample-and-hold, SH
1
; ADC
1
converts it on the signal HOLD1. B1 is
sampled by the synchronous sample-and-hold, SH
3
; ADC
2
converts it on the signal HOLD1. AN1 is sampled
by the synchronous sample-and-hold, SH
5
; ADC
3
converts it on the signal HOLD1. A2 is sampled by the
synchronous sample-and-hold, SH
2
, on the signal HOLD1. B2 is sampled by the synchronous
sample-and-hold, SH
4,
on the signal HOLD1.