Datasheet
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&./01
SBAS253E − MAY 2003 − REVISED JULY 2006
www.ti.com
15
1.11 FUNCTIONAL BLOCK DIAGRAM
DATA<0.15>
ADC
1
12−Bit
Conv
DAC
1
12−Bit
DAC
2
12−Bit
Gain
Offset
Input
Select
SH
1
SH
2
MUX
1
Conv
Conv
ADDR<0.5>
RAM
A1p
IUp
A2p
Up/Down Counter 1
16−Bit
DAV
INT
U_COMP
U_ILIM
CLK
Conv
RST
HOLD1
HOLD2
CNTA1
CNTB1
CNTB2
CNTA2
WR
M1
M0
RD
CS
REFOUT
REFIN
Internal
2.5V
Reference
Ref
IUn
A1n
A2n
MUX
4
SH
4
SH
6
SH
7
SH
3
MUX
2
B1p
IVp
B2p
IVn
Axp
Axn
B1n
B2n
Bxp
Bxn
MUX
3
AN1p
IWp
AN2p
IWn
AN1n
AN2n
AN3p
AN3n
A1
A2
V_COMP
B1
B2
W_COMP
V_ILIM
W_ILIM
DAIN
ADC
2
12−Bit
DAC
3
12−Bit
DAC
4
12−Bit
Gain
Offset
MUX
5
SH
5
ADC
3
12−Bit
DAC
5
12−Bit
DAC
6
12−Bit
Gain
Offset
DAC
7
8−Bit
FIFO
Control
Logic
Up/Down Counter 2
16−Bit
DAOUT
U_Cp
U_Cn
V_Cp
V_Cn
W_Cp
W_Cn
Figure 1−2. Functional Diagram