Datasheet

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ADS7866
ADS7867
ADS7868
SLAS465 – JUNE 2005
SPECIFICATIONS, ADS7868 (continued)
At –40 ° C to 85 ° C, f
SAMPLE
= 280 KSPS and f
SCLK
= 3.4 MHz if 1.6 V ≤ V
DD
≤ 3.6 V; f
SAMPLE
= 140 KSPS and f
SCLK
= 1.7 MHz if
1.2 V ≤ V
DD
< 1.6 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
1.2 V ≤ V
DD
< 1.6 V –0.2 0.2 × V
DD
1.6 V ≤ V
DD
< 1.8 V –0.2 0.2 × V
DD
V
IL
Input logic low level V
1.8 V ≤ V
DD
< 2.5 V –0.2 0.3 × V
DD
2.5 V ≤ V
DD
≤ 3.6 V –0.2 0.8
I
SCLK
SCLK pin leakage current Digital input = 0 V or V
DD
–1 0.02 1 µA
I
CS
CS pin leakage current ± 1 µA
Digital input pin
C
IN
10 pF
capacitance
DIGITAL OUTPUT
V
OH
Output logic high level I
SOURCE
= 200 µA V
DD
–0.2 V
DD
V
V
OL
Output logic low level I
SINK
= 200 µA 0 0.2 V
I
SDO
SDO pin leakage current Floating output –1 1 µA
Digital output pin
C
OUT
Floating output 10 pF
capacitance
Data format, straight
binary
POWER SUPPLY REQUIREMENTS
V
DD
Supply voltage 1.2 3.6 V
f
SAMPLE
= 280 KSPS, f
SCLK
= 3.4 MHz, V
DD
= 3.6 V 439 500
µA
f
SAMPLE
= 100 KSPS, f
SCLK
= 3.4 MHz, V
DD
= 3.6 V 154
f
SAMPLE
= 280 KSPS, f
SCLK
= 3.4 MHz, V
DD
= 1.6 V 264 330
Supply current, Digital Inputs = 0 V
I
DD
µA
normal operation or V
DD
f
SAMPLE
= 100 KSPS, f
SCLK
= 3.4 MHz, V
DD
= 1.6 V 93
f
SAMPLE
= 140 KSPS, f
SCLK
= 1.7 MHz, V
DD
= 1.2 V 201 250
µA
f
SAMPLE
= 50 KSPS, f
SCLK
= 1.7 MHz, V
DD
= 1.2 V 70
I
DD
Power-down mode SCLK on or off 0.008 0.3 µA
POWER DISSIPATION
f
SAMPLE
= 280 KSPS, f
SCLK
= 3.4 MHz, V
DD
= 3.6 V 1.58 1.8
Normal operation f
SAMPLE
= 280 KSPS, f
SCLK
= 3.4 MHz, V
DD
= 1.6 V 0.42 0.53 mW
f
SAMPLE
= 140 KSPS, f
SCLK
= 1.7 MHz, V
DD
= 1.2 V 0.24 0.3
Power-down mode SCLK on or off, V
DD
= 3.6 V 1.08 µW
TEMPERATURE RANGE
Specified performance –40 85 ° C
8