Datasheet

C[1:0]='00' ® CHx0isNext
P[1:0]='01' ® FeaturesON
A[2:0]='001' ® WriteDAC
C[1:0]='00' ® CHx0isNext
P[1:0]='00’ ® NoFeatures
DataInterpretedas
DACValueOnly
SDIDataIgnored
C[1:0]='00' ® CHx0isNext
P[1:0]='00’ ® NoFeatures
12-Bit
DataCHA1
12-Bit
DataCHA0
12-Bit
DataCHA0
12-Bit
DataCHA0
10-Bit
DACValue
Previous12-Bit
DataCHAx
12-Bit
DataCHB1
12-Bit
DataCHB0
12-Bi
DataCHB0
12-Bit
DataCHB0
12-Bit
DataCHB1
Previous12-Bit
DataCHBx
Conversionof
BothCHx1
Conversionof
BothCHx1
Conversionof
BothCHx0
Conversionof
BothCHx0
Conversionof
BothCHx0
PreviousConversion
ofBothCHxx
0 sm 0.5 sm 1.0 sm 1.5 sm 2.0 sm 2.5 sm 3.0 sm
1
16
1
16
1
16
1
16
1
16
1
1
CLOCK
CONVST
SDI
M0
M1
RD
CS
SDOA
SDOB
BUSY
C[1:0]='11' ® CHx1isNext
P[1:0]='01' ® FeaturesON
A[2:0]='011' ® ReadDAC
10-Bit
DACValue
ADS7863
www.ti.com
SBAS383E JUNE 2007REVISED JANUARY 2011
Programming the Reference DAC
P[1:0] = '01' and A[2:0] = '011' to initialize the DAC
(Not ADS7861-Compatible)
read access. Triggering the RD line again causes the
SDOA output to send '0000' followed by the 10-bit
The internal reference DAC can be set by issuing an
DAC value and another '00'. During the second RD
RD pulse while providing an SDI word with P[1:0] =
access, data present on SDI are ignored, while in
'01' and A[2:0] = '001'. Thereafter, a second RD pulse
Mode I and Mode III valid conversion data for channel
must be generated with an SDI word starting with the
B are present on SDOB; the conversion results of
first two bits being ignored, followed by the actual
channel A are lost. The default value of the DAC
10-bit DAC value (see Figure 40).
register after power-up is 0x3FF, corresponding to a
To verify the DAC setting, an RD pulse must be
reference voltage of 2.5V on the REF
OUT
pin.
generated while providing an SDI word containing
Figure 40. DAC Write and Read Access Timing Diagram
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