Datasheet

Every2nd
CONVST
IsIgnored
Every2nd
CONVST
IsIgnored
Every2nd
CONVST
IsIgnored
CHx
B0 A10A 1B 0A
CHx
12-Bit
DataCHB1
12-Bit
DataCHA0
12-Bit
DataCHA0
12-Bit
DataCHB0
12-Bit
DataCHA1
Previous12-Bit
DataCHAx
Previous12-Bit
DataCHBx
High-Z
NoConversion,
ReadAccessOnly
NoConversion,
ReadAccessOnly
Conversion
ofBothCHx0
Conversion
ofBothCHx1
Conversion
ofBothCHx0
PreviousConversion
ofBothCHxx
0 sm 0.5 sm 1.0 sm 1.5 sm 2.0 sm 2.5 sm 3.0 sm
1
16
1
16
1
16
1
16
1
16
1 1
CLOCK
CONVST
SDI
M0
M1
RD
CS
SDOA
SDOB
BUSY
Bothchannel0sareconvertedfirst,
followedbyconversionofbothchannel1s.
C[1:0]isIgnored
P[1:0]='00' NoFeatures®
C[1:0]isIgnored
P[1:0]='00' NoFeatures®
C[1:0]isIgnored
P[1:0]='00' NoFeatures®
C[1:0]isIgnored
P[1:0]='00' NoFeatures®
C[1:0]isIgnored
P[1:0]='00' NoFeatures®
C[1:0]isIgnored
P[1:0]='00' NoFeatures®
ADS7863
SBAS383E –JUNE 2007–REVISED JANUARY 2011 www.ti.com
MODE IV
Output data consist of a channel indicator ('0' for
CHx0 or '1' for CHx1), followed by the ADC indicator
In the same way as Mode II, Mode IV uses the SDOA
('0' for CHAx or '1' for CHBx), 12 bits of conversion
output line exclusively to transmit data while the
results, and end with '00'.
differential channels are switched automatically.
Following the first conversion after M1 goes high, the
SDOB output 3-states (see Figure 35).
Figure 35. Mode IV Timing Diagram (M0 = 1 ; M1 = 1)
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