Datasheet
ADS7863
SBAS383E –JUNE 2007–REVISED JANUARY 2011
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RESET
However, the DAC output voltage should not be
programmed below 0.5V to ensure the correct
The ADS7863 features an internal power-on-reset
functionality of the reference output buffer. This buffer
(POR) function. When the device is powered up, the
is connected between the DAC and the REF
OUT
pin,
POR sets the device in default mode when the AVDD
and is capable of driving the capacitor at the REF
IN
reaches 1.8V. An external software reset can be
pin. A minimum of 470nF is required to keep the
issued using SDI register bits A[2:0] (see the Digital
reference stable (see the previous discussion of
section).
REF
IN
above). For applications that use an external
reference source, the internal reference can be
REF
IN
disabled using bit RP in the SDI Register (see the
The reference input is not buffered and is directly Digital section). The settling time of the REF
OUT
pin is
connected to the ADC. The converter generates 500ms, maximum with the reference capacitor
spikes on the reference input voltage because of connected. The default value of the REF
OUT
pin after
internal switching. Therefore, an external capacitor to power-up is 2.5V.
the analog ground (AGND) should be used to
For operation with a 2.7V analog supply and a 2.5V
stabilize the reference input voltage. This capacitor
reference, the internal reference buffer requires a
should be at least 470nF. Ceramic capacitors (X5R
rail-to-rail input and output. Such buffers typically
type) with values up to 1mF are commonly available
contain two input stages; when the input voltage
as SMD in 0402 size.
passes the mid-range area, a transition occurs at the
output because of switching between the two input
REF
OUT
stages. In this voltage range, rail-to-rail amplifiers
The ADS7863 includes a low-drift, 2.5V internal generally show a very poor power-supply rejection.
reference source. This source feeds a 10-bit string
As a result of this poor performance, the ADS7863
DAC that is controlled via the serial interface. As a
buffer has a fixed transition at DAC code 509
result of this architecture, the voltage at the REF
OUT
(0x1FD). At this code, the DAC may show a jump of
pin is programmable in 2.44mV steps and can be
up to 10mV in its transfer function.
adjusted to specific application requirements without
the use of additional external components.
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