Datasheet

®
6
ADS7845
THEORY OF OPERATION
The ADS7845 is a classic Successive Approximation Reg-
ister (SAR) analog-to-digital (A/D) converter. The architec-
ture is based on capacitive redistribution which inherently
includes a sample/hold function. The converter is fabricated
on a 0.6µs CMOS process.
The basic operation of the ADS7845 is shown in Figure 1.
The device requires an external reference and an external
clock. It operates from a single supply of 2.0V to 5.25V. The
external reference can be any voltage between 1V and +V
CC
.
The value of the reference voltage directly sets the input
range of the converter. The average reference input current
depends on the conversion rate of the ADS7845.
The analog input to the converter is provided via the WIPER
input. In the measurement mode, the lower right corner of the
panel is connected to GND and the upper left corner is
connected to V
CC
. When the lower left corner is connected to
GND and the upper right corner is connected to V
CC
, a “Y”
measurement is made. When the lower left corner is con-
nected to V
CC
and the upper right corner is connected
to GND, a “X” measurement is made. By maintaining a
differential input to the converter and a differential reference
architecture, it is possible to negate the switch’s on-resistance
error (should this be a source of error for the particular
measurement).
ANALOG INPUT
Figure 2 shows a block diagram of the input multiplexer on
the ADS7845, the differential input of the A/D converter, and
the converter’s differential reference. Table I and Table II
show the relationship between the A2, A1, A0, and SER/DFR
control bits and the configuration of the ADS7845. The
control bits are provided serially via the DIN pin—see the
Digital Interface section of this data sheet for more details.
When the converter enters the hold mode, the voltage differ-
ence between the +IN and –IN inputs (see Figure 2) is
captured on the internal capacitor array. The input current on
the analog inputs depends on the conversion rate of the
device. During the sample period, the source must charge the
internal sampling capacitor (typically 25pF). After the ca-
pacitor has been fully charged, there is no further input
current. The rate of charge transfer from the analog source to
the converter is a function of conversion rate.
A2 A1 A0 DRV1 DRV2 AUXIN INTERRUPT –IN
(1)
X POSITION Y POSITION +REF
(1)
–REF
(1)
0 0 1 ON GND OFF ON +V
REF
GND
1 0 1 ON GND ON OFF +V
REF
GND
0 1 0 ON GND OFF OFF +V
REF
GND
1 1 0 DOUT GND OFF OFF +V
REF
GND
TABLE I. Input Configuration—Single-Ended Reference Mode (SER/DFR HIGH).
NOTE: (1) Internal node, for clarification only—not directly accessible by the user.
A2 A1 A0 DRV1 DRV2 AUXIN INTERRUPT –IN
(1)
X SWITCHES Y SWITCHES +REF
(1)
–REF
(1)
0 0 1 ON LR OFF ON UL LR
1 0 1 ON LR ON OFF UL LR
0 1 0 ON GND OFF OFF +V
REF
GND
1 1 0 DOUT GND OFF OFF +V
REF
GND
NOTE: (1) Internal node, for clarification only—not directly accessible by the user.
TABLE II. Input Configuration—Differential Reference Mode (SER/DFR LOW).
FIGURE 1. Basic Operation of the ADS7845.
+V
CC
UL
UR
LL
LR
GND
WIPER
AUXIN
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
DCLK
CS
DIN
BUSY
DOUT
PENIRQ
+V
CC
V
REF
Serial/Conversion Clock
Chip Select
Serial Data In
Converter Status
Serial Data Out
+
1µF
to
10µF
(Optional)
+2.7V to +5V
ADS7845
Auxiliary Input
WIPER
0.1µF
Pen Interrupt
External reference required
with auxiliary input. Otherwise,
NC in differential mode or
V
CC
or external V
REF
in
single-ended mode.
100kΩ (optional)
0.1µF