Datasheet

ADS7844
2
SBAS100A
www.ti.com
SPECIFICATION: +5V
At T
A
= –40°C to +85°C, +V
CC
= +5V, V
REF
= +5V, f
SAMPLE
= 200kHz, and f
CLK
= 16 • f
SAMPLE
= 3.2MHz, unless otherwise noted.
ADS7844E, N ADS7844EB, NB
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
ANALOG INPUT
Full-Scale Input Span Positive Input - Negative Input 0 V
REF
✻✻V
Absolute Input Range Positive Input –0.2 +V
CC
+0.2 ✻✻V
Negative Input –0.2 +1.25 ✻✻V
Capacitance 25 ✻ pF
Leakage Current ±1 ✻ µA
SYSTEM PERFORMANCE
Resolution 12 ✻ Bits
No Missing Codes 12 ✻ Bits
Integral Linearity Error ±2 ±1 LSB
(1)
Differential Linearity Error ±0.8 ±0.5 ±1 LSB
Offset Error ±3 ✻ LSB
Offset Error Match 0.15 1.0 ✻✻ LSB
Gain Error ±4 ±3 LSB
Gain Error Match 0.1 1.0 ✻✻ LSB
Noise 30 ✻ µVrms
Power Supply Rejection 70 ✻ dB
SAMPLING DYNAMICS
Conversion Time 12 ✻ Clk Cycles
Acquisition Time 3 ✻ Clk Cycles
Throughput Rate 200 ✻ kHz
Multiplexer Settling Time 500 ✻ ns
Aperture Delay 30 ✻ ns
Aperture Jitter 100 ✻ ps
DYNAMIC CHARACTERISTICS
Total Harmonic Distortion
(2)
V
IN
= 5V
PP
at 10kHz –76 –78 dB
Signal-to-(Noise + Distortion) V
IN
= 5V
PP
at 10kHz 71 72 dB
Spurious Free Dynamic Range V
IN
= 5V
PP
at 10kHz 76 78 dB
Channel-to-Channel Isolation V
IN
= 5V
PP
at 50kHz 120 ✻ dB
REFERENCE INPUT
Range 0.1 +V
CC
✻✻V
Resistance DCLK Static 5 ✻ GΩ
Input Current 45 100 ✻✻ µA
f
SAMPLE
= 12.5kHz 2.5 ✻ µA
DCLK Static 0.001 3 ✻✻ µA
DIGITAL INPUT/OUTPUT
Logic Family CMOS ✻
Logic Levels
V
IH
| I
IH
| ≤ +5µA 3.0 5.5 ✻✻V
V
IL
| I
IL
| ≤ +5µA –0.3 +0.8 ✻✻V
V
OH
I
OH
= –250µA 3.5 ✻ V
V
OL
I
OL
= 250µA 0.4 ✻ V
Data Format Straight Binary ✻
POWER SUPPLY REQUIREMENTS
+V
CC
Specified Performance 4.75 5.25 ✻✻V
Quiescent Current 550 900 ✻ µA
f
SAMPLE
= 12.5kHz 300 ✻ µA
Power-Down Mode
(3)
, CS = +V
CC
3 ✻ µA
Power Dissipation 4.5 ✻ mW
TEMPERATURE RANGE
Specified Performance –40 +85 ✻✻°C
✻ Same specifications as ADS7844E, ADS7844N.
NOTE: (1) LSB means Least Significant Bit. With V
REF
equal to +5.0V, one LSB is 1.22mV. (2) First five harmonics of the test frequency. (3) Auto power-down mode
(PD1 = PD0 = 0) active or SHDN = GND.