Datasheet

Sr A
1
1 0 0 1 0 A
0
R A
S X0 0 0 0 1 X X N
Sr A
1
1 0 0 1 0 A
0
W A SD C
2
C
1
C
0
PD
1
PD
0
X X A
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
N P
F/S Mode
HS Mode Master Code
HS Mode Enabled
HS Mode Enabled
Return to F/S Mode
(1)
HS Mode Enabled
ADC Power-Down Mode ADC Sampling Mode
ADC Converting Mode
Command ByteWrite-Addressing Byte
Read-Addressing Byte
ADC Power-Down Mode
(depending on power-down selection bits)
1 x (8 Bits + not-ack)
From Master to Slave
A = acknowledge (SDA LOW)
N = not acknowledge (SDA HIGH)
S = START Condition
P = STOP Condition
Sr = repeated START condition
W = '0' (WRITE)
R = '1' (READ)
From Slave to Master
SCLH is stretched LOW waiting for data conversion
(2)
ADS7830
SBAS302C –DECEMBER 2003–REVISED OCTOBER 2012 www.ti.com
READING IN HS MODE See Figure 16 for a typical read sequence for HS
mode. Included in the read sequence is the shift from
High Speed (HS) mode is fast enough that codes can
F/S to HS modes. It may be desirable to remain in
be read out one at a time. In HS mode, there is not
HS mode after reading a conversion; to do this, issue
enough time for a single conversion to complete
a repeated START instead of a STOP at the end of
between the reception of a repeated START condition
the read sequence, since a STOP causes the part to
and the read-addressing byte, so the ADS7830
return to F/S mode.
stretches the clock after the read-addressing byte has
been fully received, holding it LOW until the
conversion is complete.
(1) To remain in HS mode, use repeated START instead of STOP.
(2) SCLH is SCL in HS mode.
Figure 16. Typical Read Sequence in HS Mode
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