Datasheet

Sr A
1
1 0 0 1 0 A
0
R A D
5
D
4
D
3
D
2
D
1
D
0
N PD
7
D
6
S A
1
1 0 0 1 0 A
0
W A SD C
2
C
1
C
0
PD
1
PD
0
X X A
ADC Power-Down Mode
Read-Addressing Byte 1 x (8 Bits + not-ack)
From Master to Slave
A = acknowledge (SDA LOW)
N = not acknowledge (SDA HIGH)
S = START Condition
P = STOP Condition
Sr = repeated START condition
W = '0' (WRITE)
R = '1' (READ)
From Slave to Master
Write-Addressing Byte
ADC Converting Mode
Command Byte
ADC Power-Down Mode
(depending on power-down selection bits)
ADC Sampling Mode
See Note (1)
ADS7830
www.ti.com SBAS302C –DECEMBER 2003–REVISED OCTOBER 2012
READING IN F/S MODE At the end of reading conversion data the ADS7830
can be issued a repeated START condition by the
Figure 15 describes the interaction between the
master to secure bus operation for subsequent
master and the slave ADS7830 in Fast or Standard
conversions of the A/D converter. This would be the
(F/S) mode.
most efficient way to perform continuous conversions.
(1) To secure bus operation and loop back to the stage of write-addressing for next conversion, use repeated START.
Figure 15. Typical Read Sequence in F/S Mode
Copyright © 2003–2012, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Links: ADS7830