Datasheet

ADS7828
14
SBAS181C
www.ti.com
Internal V
REF
vs Turn-On Time Typical Characteristic plot.
If the PD1 bit has been set to logic ‘0’ while using the
ADS7828, then the settling time must be reconsidered
after PD1 is set to logic ‘1’. In other words, whenever the
internal reference is turned on after it has been turned off,
the settling time must be long enough to get 12-bit accu-
racy conversion.
3) When the internal reference is off, it is not turned on until
both the first Command Byte with PD1 = ‘1’ is sent
and
then
a STOP condition or repeated START condition is
issued. (The actual turn-on time occurs once the STOP or
repeated START condition is issued.) Any Command Byte
with PD1 = ‘1’ issued after the internal reference is turned
on serves only to keep the internal reference on. Other-
wise, the internal reference would be turned off by any
Command Byte with PD1 = ‘0’.
The example in Figure 5 can be generalized for a HS mode
conversion cycle by simply swapping the timing of the con-
version cycle.
If using an external reference, PD1 must be set to ‘0’, and the
external reference must be settled. The typical sequence in
Figure 3 or Figure 4 can then be used.
READING WITH REFERENCE ON/OFF
The internal reference defaults to off when the ADS7828
power is on. To turn the internal reference on or off, see
Table I. If the reference (internal or external) is constantly
turned on and off, a proper amount of settling time must be
added before a normal conversion cycle can be started. The
exact amount of settling time needed varies depending on
the configuration.
See Figure 5 for an example of the proper internal reference
turn-on sequence before issuing the typical read sequences
required for the F/S mode when an internal reference is
used.
When using an internal reference, there are three things that
must be done:
1) In order to use the internal reference, the PD1 bit of
Command Byte must always be set to logic ‘1’ for each
sample conversion that is issued by the sequence, as
shown in Figure 3.
2) In order to achieve 12-bit accuracy conversion when
using the internal reference, the internal reference
settling time must be considered, as shown in the
FIGURE 5. Internal Reference Turn-On Sequence and Typical Read Sequence (F/S mode shown).
Sr A
1
10010 A
0
RA0000D
11
D
10
D
9
D
8
AD
7
D
6 . .
.D
1
D
0
NP
SA
1
1001 10A
0
W ASDC
2
C
1
C
0
PD
0
XXA
SA
1
1001 10A
0
W AXXXXXXXAP
Wait until the required
settling time is reached
Internal Reference Turn-On Sequence
Settled Internal Reference
Settled Internal Reference
Internal Reference
Turn-On
Settling Time
Typical Read
Sequence
(1)
in F/S Mode
From Master to Slave
A = acknowledge (SDA LOW)
N = not acknowledge (SDA HIGH)
S = START Condition
P = STOP Condition
Sr = repeated START condition
W = '0' (WRITE)
R = '1' (READ)
From Slave to Master
Command ByteWrite-Addressing Byte
Command ByteWrite-Addressing Byte
ADC Power-Down Mode ADC Sampling Mode
ADC Converting Mode
ADC Power-Down Mode
(depending on power-down selection bits)
Read-Addressing Byte 2 x (8 Bits + ack/not-ack)
see
note
(2)
NOTES: (1) Typical read sequences can be reused after the internal reference is settled.
(2) To secure bus operation and loop back to the stage of write-addressing for next conversion, use repeated START.