Datasheet

ADS7807
3
SBAS022D
www.ti.com
ELECTRICAL CHARACTERISTICS (Cont.)
At T
A
= 40°C to +85°C, f
S
= 40kHz, V
DIG
= V
ANA
= +5V, and using internal reference and fixed resistors (see Figure 7b), unless otherwise specified.
ADS7807P, U ADS7807PB, UB
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
AC ACCURACY
Spurious-Free Dynamic Range f
IN
= 1kHz, ±10V 90 100 96 dB
(6)
Total Harmonic Distortion f
IN
= 1kHz, ±10V 100 90 96 dB
Signal-to-(Noise + Distortion) f
IN
= 1kHz, ±10V 83 88 86 dB
60dB Input 30 32 dB
Signal-to-Noise f
IN
= 1kHz, ±10V 83 88 86 dB
Usable Bandwidth
(7)
130 kHz
Full-Power Bandwidth (3dB) 600 kHz
SAMPLING DYNAMICS
Aperture Delay 40 ns
Aperture Jitter 20 ps
Transient Response FS Step 5 µs
Over-Voltage Recovery
(8)
750 ns
REFERENCE
Internal Reference Voltage No Load 2.48 2.5 2.52 ✻✻ V
Internal Reference Source Current 1 µA
(Must use external buffer.)
Internal Reference Drift 8 ppm/°C
External Reference Voltage Range 2.3 2.5 2.7 ✻✻ V
for Specified Linearity
External Reference Current Drain External 2.5000V Ref 100 µA
DIGITAL INPUTS
Logic Levels
V
IL
0.3 +0.8 ✻✻V
V
IH
(9)
+2.0 V
D
+ 0.3V ✻✻V
I
IL
V
IL
= 0V ±10 µA
I
IH
V
IH
= 5V ±10 µA
DIGITAL OUTPUTS Parallel 16 bits in 2-bytes; Serial
Data Format Binary Twos Complement or Straight Binary
Data Coding
V
OL
I
SINK
= 1.6mA +0.4 V
V
OH
I
SOURCE
= 500µA+4 V
Leakage Current High-Z State, ±5 µA
V
OUT
= 0V to V
DIG
Output Capacitance High-Z State 15 pF
DIGITAL TIMING
Bus Access Time R
L
= 3.3k, C
L
= 50pF 83 ns
Bus Relinquish Time R
L
= 3.3k, C
L
= 10pF 83 ns
POWER SUPPLIES
Specified Performance
V
DIG
Must be V
ANA
+4.75 +5 +5.25 ✻✻ V
V
ANA
+4.75 +5 +5.25 ✻✻ V
I
DIG
0.6 mA
I
ANA
5.0 mA
Power Dissipation V
ANA
= V
DIG
= 5V, f
S
= 40kHz 28 35 ✻✻mW
REFD HIGH 23 mW
PWRD and REFD HIGH 50 µW
TEMPERATURE RANGE
Specified Performance 40 +85 ✻✻ °C
Derated Performance 55 +125 ✻✻ °C
Storage 65 +150 ✻✻ °C
Thermal Resistance (
θ
JA
)
DIP 75 °C/W
SO 75 °C/W
Same specifications as ADS7807P, U.
NOTES: (1) LSB means Least Significant Bit. One LSB for the ±10V input range is 305µV.
(2) Typical rms noise at worst-case transition.
(3) As measured with fixed resistors, see Figure 7b. Adjustable to zero with external potentiometer.
(4) Full-scale error is the worst case of Full-Scale or +Full-Scale untrimmed deviation from ideal first and last code transitions, divided by the
transition voltage (not divided by the full-scale range) and includes the effect of offset error.
(5) This is the time delay after the ADS7807 is brought out of Power-Down mode until all internal settling occurs and the analog input is acquired to
rated accuracy. A Convert command after this delay will yield accurate results.
(6) All specifications in dB are referred to a full-scale input.
(7) Usable bandwidth defined as full-scale input frequency at which Signal-to-(Noise + Distortion) degrades to 60dB.
(8) Recovers to specified performance after 2 FS input overvoltage.
(9) The minimum V
IH
level for the DATACLK signal is 3V.