Datasheet

ADS7749
®
FIGURE 4. R/C Pulse High — Outputs Enabled Only While
R/C Is High.
FIGURE 3. R/C Pulse Low—Outputs Enabled After Conver-
sion.
SYMBOL PARAMETER MIN TYP MAX UNITS
t
HRL
Low R/C Pulse Width 25 ns
t
DS
STS Delay from R/C 200 ns
t
HDR
Data Valid After R/C Low 25 ns
t
HRH
High R/C Pulse Width 100 ns
t
DDR
Data Access Time 150 ns
TABLE IV. Stand-Alone Mode Timing. (T
A
= T
MIN
to T
MAX
).
SYMBOL PARAMETER MIN TYP MAX UNITS
Convert Mode
t
DSC
STS delay from CE 60 200 ns
t
HEC
CE Pulse width 50 30 ns
t
SSC
CS to CE setup 50 20 ns
t
HSC
CS low during CE high 50 20 ns
t
SRC
R/C to CE setup 50 0 ns
t
HRC
R/C low during CE high 50 20 ns
t
SAC
A
O
to CE setup 0 ns
t
HAC
A
O
valid during CE high 50 20 ns
Read Mode
t
DD
Access time from CE 75 150 ns
t
HD
Data valid after CE low 25 35 ns
t
HL
Output float delay 100 150 ns
t
SSR
CS to CE setup 50 0 ns
t
SRR
R/C to CE setup 0 ns
t
SAR
A
O
to CE setup 50 25 ns
t
HSR
CS valid after CE low 0 ns
t
HRR
R/C high after CE low 0 ns
t
HAR
A
O
valid after CE low 50 ns
t
HS
STATUS delay after data valid 75 150 375 ns
TABLE V. Timing Specifications, Fully Controlled Operation. (T
A
= T
MIN
to T
MAX
).
FIGURE 5. Conversion Cycle Timing. FIGURE 6. Read Cycle Timing.
R/C
DB11-DB0
STATUS
Data Valid
High-Z-State
t
HRH
t
DS
t
DDR
High-Z
t
HDR
t
CONVERSION
R/C
DB11-DB0
Status
High Impedance
t
SAC
t *
t
DSC
t
HSC
A
0
t
HAC
t
SSC
t
HEC
CS
CE
* t
X
includes t
AQ
+ t
C
in ADC774 Emulation Mode,
t
C
only in S/H Control Mode.
t
HRC
X
t
SRC
R/C
DB11-DB0
STATUS
Data Valid Data Valid
High-Z-State
t
HRL
t
DS
t
HDR
t
HS
t
CONVERSION
R/C
DB11-DB0
Status
High-Z
t
DD
t
HS
A
0
t
SSR
CS
CE
t
SSR
t
HL
t
HD
t
SAR
t
HSR
t
HRR
t
HAR
Data Valid