Datasheet

ADS77411
®
In particular, the unused input pin should not be connected
to any capacitive load, including high impedance switches.
Even a few pF on the unused pin can degrade acquisition
time.
Coupling between analog input and digital lines should be
minimized by careful layout. For instance, if the lines must
cross, they should do so at right angles. Parallel analog and
digital lines should be separated from each other by a pattern
connected to common.
If external full scale and offset potentiometers are used, the
potentiometers and associated resistors should be as close as
possible to the ADS774.
POWER SUPPLY DECOUPLING
On the ADS774, +5V (to Pin 1) is the only power supply
required for correct operation. Pin 7 is not connected inter-
nally, so there is no problem in existing ADC774 sockets
where this is connected to +15V. Pin 11 (V
EE
) is only used
as a logic input to select modes of control over the sampling
function as described above. When used in an existing
ADC774 socket, the –15V on pin 11 selects the ADC774
Emulation Mode. Since pin 11 is used as a logic input, it is
immune to typical supply variations.
INSTALLATION
LAYOUT PRECAUTIONS
Analog (pin 9) and digital (pin 15) commons are not con-
nected together internally in the ADS774, but should be
connected together as close to the unit as possible and to an
analog common ground plane beneath the converter on the
component side of the board. In addition, a wide conductor
pattern should run directly from pin 9 to the analog supply
common, and a separate wide conductor pattern from pin 15
to the digital supply common.
If the single-point system common cannot be established
directly at the converter, pin 9 and pin 15 should still be
connected together at the converter. A single wide conductor
pattern then connects these two pins to the system common.
In either case, the common return of the analog input signal
should be referenced to pin 9 of the ADC. This prevents any
voltage drops that might occur in the power supply common
returns from appearing in series with the input signal.
The speed of the ADS774 requires special caution regarding
whichever input pin is unused. For 10V input ranges, pin 14
(20V Range) must be unconnected, and for 20V input
ranges, pin 13 (10V Range) must be unconnected. In both
cases, the unconnected input should be shielded with ground
plane to reduce noise pickup.
S/H CONTROL MODE ADC774 EMULATION MODE
(Pin 11 Connected to +5V) (Pin 11 Connected to 0V to –15V)
SYMBOL PARAMETER
MIN TYP MAX MIN TYP MAX UNITS
t
AQ
+ t
C
Throughput Time:
12-bit Conversions 8 8.5 8 8.5 µs
8-bit Conversions 6 6.3 6 6.3 µs
t
C
Conversion Time:
12-bit Conversions 6.4 6.4 µs
8-bit Conversions 4.4 4.4 µs
t
AQ
Acquisition Time 1.4 1.4 µs
t
AP
Aperture Delay 20 1600 ns
t
J
Aperture Uncertainty 0.3 10 ns
TABLE VI. Conversion Timing, T
MIN
to T
MAX
.
FIGURE 9. Signal Acquisition and Conversion Timing.
Signal
Acquisition
Conversion
Signal
Acquisition
t
AP
Signal
Acquisition
Conversion
Signal
Acquisition
t
C
t
AQ
t
C
t
AQ
t
AP
R/C
S/H Control Mode
Pin 11 connected to +5V.
ADC774 Emulation Mode*
Pin 11 connected to V
EE
or ground.
*In the ADC774 Emulation Mode, a convert command triggers a delay that
allows the ADS774 enou
g
h time to ac
q
uire the input si
g
nal before convertin
g
.