Datasheet

UndefinedZone
0.400
0.125
AVDD(V)
t(s)
5.500
5.000
4.000
3.000
2.700
2.000
1.000
0
1.500
SpecifiedSupply
VoltageRange
POR
TriggerLevel
0.350
ADS7229
ADS7230
SBAS437A – MAY 2008 – REVISED JUNE 2009 ............................................................................................................................................................... www.ti.com
When the device is powered up, the POR sets the device to default mode when AVDD reaches 1.5V. When the
device is powered down, the POR circuit requires AVDD to remain below 125mV for at least 350ms to ensure
proper discharging of internal capacitors and to correct the behavior of the ADC when powered up again. If
AVDD drops below 400mV but remains above 125mV, the internal POR capacitor does not discharge fully and
the device requires a software reset to perform correctly after the recovery of AVDD (this condition is shown as
the undefined zone in Figure 67 ).
Figure 67. Relevant Voltage Levels for POR
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