Datasheet

CLOCK
CONVST
BUSY
Half-Clock Mode
Full-Clock Mode
CLOCK
CONVST
BUSY
conversion n
conversion n + 1
Auto-Sleep Power-Down
7 CLOCKs
t
ACQ
conversion n
conversion n + 1
Auto-Sleep Power-Down
14 CLOCKs
t
ACQ
ADS8363
ADS7263
ADS7223
www.ti.com SBAS523B –OCTOBER 2010–REVISED JANUARY 2011
Figure 41. Actual Conversion Start in Auto-Sleep Mode
Pinout
ADS8361 COMPATIBILITY
The ADS8363/7263/7223 family is pin-compatible to
This section describes the differences between the
ADS8361IRHB. However, there are some differences
ADS8361 and the ADS8363/7263/7223 family of
that must be considered when migrating from an
devices in default mode without changing the internal
ADS8361-based design, as summarized in Table 15.
register settings (that are not available on the
ADS8361).
Table 15. Pinout Differences Between the ADS8363/7263/7223 and ADS8361
PIN NAME
PIN NO. ADS8361 ADS8363/7263/7223 IMPACT
If external reference is used, see the Internal Reference section for details.
9 REFIN REFIO1 If internal reference is used, REFIO1 must be enabled using the RPD bit in the DAC1
register.
10 REFOUT REFIO2 Because REFIO2 is disabled by default, no adjustment is required.
If external reference is used, no changes required.
11 NC RGND If REFIO1 is enabled, this pin should be tied to the analog ground plane with a dedicated
via. Furthermore, a 22µF ceramic capacitor should be used between this pin and pin 9.
18 A0 SDI See the SDI vs. A0 section for details.
This pin should be connected to the analog supply and decoupled with a 1µF capacitor
29 NC AVDD
to ensure proper functionality of the ADS8363/7263/7223 family.
This pin should be connected to the analog ground plane to ensure proper functionality
30 NC AGND
of the ADS8363/7263/7223 family.
31 NC CMA In default mode of the ADS8363 family; no changes required.
32 NC CMB In default mode of the ADS8363 family; no changes required.
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Product Folder Link(s): ADS8363 ADS7263 ADS7223