Datasheet

ADS8363
ADS7263
ADS7223
SBAS523B –OCTOBER 2010–REVISED JANUARY 2011 www.ti.com
POWER-DOWN MODES AND RESET device automatically turns off the biasing after
finishing a conversion; thus, the end of conversion
These devices have a comprehensive built-in
actually activates Auto-Sleep mode. If Sequencer
power-down feature. There are three power-down
mode is used and individual conversion start pulses
modes: Power-Down, Sleep, and Auto-Sleep
are chosen (S1 = '0'), the device automatically
Power-Down. All three power-down modes are
powers-down after each conversion; in case of a
activated with the completion of the write access,
single CONVST pulse starting the sequence (S1 =
during which the related bit(s) are asserted (PD[1:0]).
'1'), power-down is activated upon completion of the
All modes are deactivated by deasserting the
entire sequence.
respective bit(s) in the CONFIG register. The content
of the CONFIG register is not affected by any of the The device wakes up with the next CONVST pulse
power-down modes. Any ongoing conversion is but the analog input is held in sample mode for
finished before entering any of the power-down another seven clock cycles in half-clock mode, or 14
modes. Table 14 summarizes the differences among clock cycles in full-clock mode, before starting the
the three power-down modes. actual conversion (BUSY goes high thereafter), as
shown in Figure 41. This time is required to settle the
Power-Down Mode internal circuitry to the required voltage levels. The
conversion result is delayed in Auto-Sleep mode as
In Power-Down mode (PD[1:0] = '01'), all functional
shown in Figure 39.
blocks except the digital interface are disabled. In this
mode, the current demand is reduced to 5µA within In this mode, the current demand is reduced to
20µs. The wakeup time from Power-Down mode is approximately 1.2mA within 10µs.
8ms when using a reference capacitor of 22µF. The
device goes into Power-Down mode after completing Reset
any ongoing conversions.
To issue a device reset, an RD pulse must be
generated along with a control word containing A[3:0]
Sleep Mode
= '0100'. With the completion of this write access, the
In Sleep mode (PD[1:0] = '10'), the device reduces its entire device including the serial interface is forced
current demand to approximately 0.9mA within 10µs. into reset, interrupting any ongoing conversions,
The device goes into Sleep mode after completing setting the input into acquisition mode, and returning
any ongoing conversions. the register contents to their default values. After
~20ns, the serial interface becomes active again. The
Auto-Sleep Mode device also supports an automatic power-up reset
(POR) that ensures proper (default) settings of the
Auto-Sleep mode is almost identical to Sleep mode.
device.
The only differences are the method of activating the
mode and waking up the device. CONFIG register
bits PD[1:0] = '11' are only used to enable/disable this
feature. If the Auto-Sleep mode is enabled, the
Table 14. Power-Down Modes
DELAY TIME
POWER- POWER- POWER- TO NORMAL POWER-
POWER- DOWN DOWN DOWN START POWER- OPERATION WAKEUP DOWN
DOWN MODE CURRENT ENABLED BY BY DOWN BY TIME DISABLED BY
Write access
Power-Down 5µA PD[1:0] = '01' 20µs PD[1:0] = '00' 8ms PD[1:0] = '00'
completed
Write access 7 or 14 CLOCK
Sleep 1.2mA (3.6V) PD[1:0] = '10' 10µs PD[1:0] = '00' PD[1:0] = '00'
completed cycles
Each end of 7 or 14 CLOCK
Auto-Sleep 1.2mA (3.6V) PD[1:0] = '11' 10µs CONVST pulse PD[1:0] = '00'
conversion cycles
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