Datasheet

V =
REF
2.5V(code +1)
1024
ADCA
ADCB
REFCMBits[3:0]
REFCMBits[7:4]
DAC1
DAC2
REFDAC1Bit10
REFDAC2Bit10
2.5V
Reference
REFIO1
REFIO2
ADS8363
ADS7263
ADS7223
SBAS523B –OCTOBER 2010–REVISED JANUARY 2011 www.ti.com
signal should be continuously running. However, in capacitor connected. Smaller reference capacitance
applications that use the device in burst mode, the values reduce the DNL, INL, and ac performance of
clock may be held static low or high upon completion the device. By default, both reference outputs are
of the read access and before starting a new disabled and the respective values are set to 2.5V
conversion. after power-up.
The CLOCK duty cycle should be 50%. However, the For applications that use an external reference
device functions properly with a duty cycle between source, the internal reference can be disabled
30% and 70%. (default) using the RPD bit in the CONFIG register
(see the Digital section). The REFIOx pins are
RESET directly connected to the ADC; therefore, the internal
switching generates spikes that can be observed at
The ADS8363/7263/7223 feature an internal
this pin. Therefore, also in this case, an external
power-on reset (POR) function. A user-controlled
22µF capacitor to the analog ground (AGND) should
reset can also be issued using SDI register bits A[3:0]
be used to stabilize the reference input voltage.
(see the Digital section).
Disabled REFIOx pins can be left floating or can be
REFIOx directly tied to AGND or RGND.
The ADS8363/7263/7223 include a low-drift, 2.5V Each of the reference DAC outputs can be
internal reference source. This source feeds two, individually selected as a source for each channel
10-bit string DACs that are controlled through input using the Rxx bits in the REFCM register.
registers. As a result of this architecture, the Figure 29 illustrates a simplified block diagram of the
reference voltages at REFIOx are programmable in internal circuit.
2.44mV steps and can be adjusted to the application
requirements without the use of additional external
components. The actual output voltage can be
calculated using Equation 3, with code being the
decimal value of the REFDACx register content:
(3)
The reference DAC has a fixed transition at the code
508 (0x1FC). At this code, the DAC may show a jump
of up to 10mV in its transfer function. Table 3 lists
some examples of internal reference DAC settings.
However, to ensure proper performance, the
REFDACx output voltage should not be programmed
below 0.5V.
Table 3. REFDACx Setting Examples
VREFOUT DECIMAL BINARY HEXADECIMAL
(NOM) CODE CODE CODE
0.5000V 205 00 1100 1101 0CD
1.2429V 507 01 1111 1100 1FB
1.2427V 508 01 1111 1101 1FC
2.5000V 1023 11 1111 1111 3FF
A minimum of 22mF capacitance is required on each
Figure 29. Reference Selection Circuit
REFIOx output to keep the references stable. The
settling time is 8ms (maximum) with the reference
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