Datasheet

50
55
60
65
70
75
80
85
90
Input Amplitude − dBFS
30
40
50
60
70
80
90
100
110
−60 −50 −40 −30 −20 −10 0
f
IN
= 20 MHz
SFDR − dBc, dBFS
G048
SNR − dBFS
SFDR (dBc)
SFDR (dBFS)
SNR (dBFS)
SNR − dBFS
73
74
75
76
77
78
T − Temperature − °C
82
84
86
88
90
92
−40 −20 0 20 40 60 80
SFDR − dBc
G047
f
IN
= 50.1 MHz
SNR
SFDR
SNR − dBFS
70
71
72
73
74
75
76
77
78
76
78
80
82
84
86
88
90
92
0.5 1.0 1.5 2.0 2.5 3.0
SFDR − dBc
Input Clock Amplitude − V
PP
G049
SNR
SFDR
f
IN
= 50.1 MHz
SNR − dBFS
71
72
73
74
75
76
Input Clock Duty Cycle − %
82
84
86
88
90
92
35 40 45 50 55 60 65
SFDR − dBc
G050
SNR
SFDR
f
IN
= 20.1 MHz
f
S
− Sampling Frequency − MSPS
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0 20 40 60 80
P
D
− Power Dissipation − W
G051
LVDD
AVDD
Output Code
0
5
10
15
20
25
30
35
40
8180 8181 8182 8183 8184 8185 8186 8187 8188 8189
Occurence − %
G052
RMS (LSB) = 1.016
ADS6445, ADS6444
ADS6443, ADS6442
SLAS531B –MAY 2007–REVISED DECEMBER 2009 www.ti.com
TYPICAL CHARACTERISTICS (continued)
All plots are at 25°C, AVDD = LVDD = 3.3 V, maximum rated sampling frequency, sine wave input clock, 1.5 V
PP
differential
clock amplitude, 50% clock duty cycle, –1 dBFS differential analog input, internal reference mode, 0 dB gain, 32k point FFT
(unless otherwise noted)
PERFORMANCE vs TEMPERATURE PERFORMANCE vs INPUT AMPLITUDE
Figure 52. Figure 53.
PERFORMANCE vs CLOCK AMPLITUDE (differential) PERFORMANCE vs CLOCK DUTY CYCLE
Figure 54. Figure 55.
OUTPUT NOISE HISTOGRAM WITH
POWER DISSIPATION vs SAMPLING FREQUENCY INPUTS TIED TO COMMON-MODE
Figure 56. Figure 57.
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