Datasheet

70
71
72
73
74
75
76
77
78
Input Amplitude − dBFS
30
40
50
60
70
80
90
100
110
−60 −50 −40 −30 −20 −10 0
f
IN
= 20 MHz
SFDR − dBc, dBFS
G012
SNR − dBFS
SFDR (dBc)
SFDR (dBFS)
SNR (dBFS)
SNR − dBFS
71
72
73
74
75
76
77
T − Temperature − °C
74
76
78
80
82
84
86
−40 −20 0 20 40 60 80
SFDR − dBc
G011
f
IN
= 50.1 MHz
SNR
SFDR
SNR − dBFS
70
71
72
73
74
75
76
77
72
74
76
78
80
82
84
86
0.5 1.0 1.5 2.0 2.5 3.0
SFDR − dBc
Input Clock Amplitude − V
PP
G013
SNR
SFDR
f
IN
= 50.1 MHz
SNR − dBFS
72
73
74
75
76
77
78
Input Clock Duty Cycle − %
84
85
86
87
88
89
90
35 40 45 50 55 60 65
SFDR − dBc
G014
SNR
SFDR
f
IN
= 20.1 MHz
Output Code
0
5
10
15
20
25
30
35
40
8187 8188 8189 8190 8191 8192 8193 8194 8195 8196
Occurence − %
G016
RMS (LSB) = 1.064
ADS6445, ADS6444
ADS6443, ADS6442
SLAS531B MAY 2007REVISED DECEMBER 2009
www.ti.com
TYPICAL CHARACTERISTICS (continued)
All plots are at 25°C, AVDD = LVDD = 3.3 V, maximum rated sampling frequency, sine wave input clock, 1.5 V
PP
differential
clock amplitude, 50% clock duty cycle, –1 dBFS differential analog input, internal reference mode, 0 dB gain, 32k point FFT
(unless otherwise noted)
PERFORMANCE vs TEMPERATURE PERFORMANCE vs INPUT AMPLITUDE
Figure 16. Figure 17.
PERFORMANCE vs CLOCK AMPLITUDE (differential) PERFORMANCE vs CLOCK DUTY CYCLE
Figure 18. Figure 19.
OUTPUT NOISE HISTOGRAM WITH
POWER DISSIPATION vs SAMPLING FREQUENCY INPUTS TIED TO COMMON-MODE
Figure 20. Figure 21.
32 Submit Documentation Feedback Copyright © 2007–2009, Texas Instruments Incorporated
Product Folder Link(s): ADS6445, ADS6444 ADS6443, ADS6442