Datasheet

T0297-01

DB0

DB1

DB2

DB13

DA0

DA1

DA2

DA13

SampleN+1SampleN

DA0

DA1

DA2

DA13

DB0

DB1

DB2

DB13

DB0

DB1

DB2

DB13

CLKOUT

ADS62P45, ADS62P44

ADS62P43, ADS62P42

SLAS561C –JULY 2007– REVISED FEBRUARY 2012

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Output Data Format

Two output data formats are supported – 2s complement and straight binary. They can be selected using the

serial interface register bit <DATA FORMAT> or controlling the SEN pin in parallel configuration mode.

In the event of an input voltage overdrive, the digital outputs go to the appropriate full scale level. For a positive

overdrive, the output code is 0x7FF in offset binary output format, and 0x3FF in 2s complement output format.

For a negative input overdrive, the output code is 0x000 in offset binary output format and 0x400 in 2s

complement output format.

Multiplexed Output Mode

This mode is available only with CMOS interface. In this mode, the digital outputs of both the channels are

multiplexed and output on a single bus (DB0-DB13 pins), as per the timing diagram shown in Figure 99. The

channel A output pins (DA0-DA10 ) are three-stated. Since the output data rate on the DB bus is

effectively doubled, this mode is recommended only for low sampling frequencies (< 65 MSPS).

This mode can be enabled using register bits <POWER DOWN MODES> or using the parallel pins CTRL1 -3.

Figure 99. Multiplexed Mode – Output Timing

Low Latency Mode

The default latency of ADS62P4X is 14 clock cycles. For applications, which cannot tolerate large latency,

ADS62P4X includes a special mode with 10 clock cycles latency. In the low latency condition, the Digital

Processing block is bypassed and its features (offset correction, fine gain, decimation filters) are not available.

Product Folder Link(s): ADS62P45, ADS62P44 ADS62P43, ADS62P42