Datasheet

ADS62P45, ADS62P44
ADS62P43, ADS62P42
www.ti.com SLAS561C –JULY 2007– REVISED FEBRUARY 2012
Table 15.
A7–A0
D7 D6 D5 D4 D3 D2 D1 D0
(hex)
17 0 0 0 0 <FINE GAIN> 0 to 6 dB gain in 0.5 dB steps
D2–D0 <FINE GAIN> Gain programmability in 0.5 dB steps
0000 0 dB gain, default after reset
0001 0.5 dB gain
0010 1.0 dB gain
0011 1.5 dB gain
0100 2.0 dB gain
0101 2.5 dB gain
0110 3.0 dB gain
0111 3.5 dB gain
1000 4.0 dB gain
1001 4.5 dB gain
1010 5.0 dB gain
1011 5.5 dB gain
1100 6.0 dB gain
Others Unused
Table 16.
A7–A0
D7 D6 D5 D4 D3 D2 D1 D0
(hex)
18 <CUSTOM LOW> Lower 8 bits
19 0 0 <CUSTOM HIGH> Upper 6 bits
D7-D0 <CUSTOM LOW>
8 lower bits of custom pattern available at the output instead of ADC data.
D5-D0 <CUSTOM HIGH>
6 upper bits of custom pattern available at the output instead of ADC data.
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