Datasheet

ADS62P45, ADS62P44
ADS62P43, ADS62P42
SLAS561C –JULY 2007– REVISED FEBRUARY 2012 www.ti.com
SERIAL REGISTER MAP
Table 7. Summary of Functions Supported by Serial Interface
(1)
REGISTER
REGISTER FUNCTIONS
ADDRESS
A7–A0 IN
D7 D6 D5 D4 D3 D2 D1 D0
HEX
<RST>
<SERIAL
00 0 0 0 0 0 0 READOUT
Software
>
Reset
<CLKOUT
10 0 0 0 0 0 0
STRENGTH>
<LVDS CURRENT>
<CURRENT DOUBLE>
11 0 0 <DATAOUT STRENGTH>
LVDS buffer current
LVDS buffer current double
programmability
<LVDS TERMINATION>
12 0 0
Internal termination programmability
13 0 0 0 <OFFSET FREEZE> 0 0 0 0
<OUTPUT
<POWER DOWN MODES>
<REF>
<OVRD> INTERFACE> <COARSE GAIN>
14 0 and
Internal/External
Over-ride bit LVDS or CMOS 3.5 dB gain
reference
MUX mode
interface
<DATA FORMAT>
Bit/Byte wise
16 0 0 0 <TEST PATTERNS>
2s complement or
(LVDS only)
straight binary
<FINE GAIN>
17 0 0 0 0
0 to 6 dB gain in 0.5 dB steps
18 <CUSTOM LOW> Lower 8 bits
19 0 0 <CUSTOM HIGH> Upper 6 bits
<OFFSET TC> <GAIN CORRECTION>
<LOW
1A
LATENCY>
Offset correction time constant 0 to 0.5 dB, steps of 0.05 dB
<OFFSET
<FILTER COEFF
EN>
SELECT> <FILTER Enable> <DECIMATION RATE>
<ODD TAP
1B 0
Offset
Enable>
In-built or custom Enable digital filtering Decimate by 2, 4, 8
correction
coefficients
enable
<DECIMATION FILTER
1D 0 0 0 0 0 0
FREQ BANDS>
1E to 2F <FILTER COEFFICIENTS> 12 coefficients, each 12 bit signed
(1) Multiple functions in a register can be programmed in a single write operation.
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