Datasheet

T0109-01
Register Address RegisterData
t
(SCLK)
t
(DSU)
t
(DH)
t
(SLOADS)
D7A7 D3A3 D5A5 D1A1 D6A6 D2A2 D4A4 D0A0
SDATA
SCLK
SEN
RESET
t
(SLOADH)
ADS62P45, ADS62P44
ADS62P43, ADS62P42
www.ti.com SLAS561C –JULY 2007– REVISED FEBRUARY 2012
Figure 6. Serial Interface Timing
Serial Register Readout (only when CMOS interface is used)
The device includes an option where the contents of the internal registers can be read back. This may be useful
as a diagnostic check to verify the serial interface communication between the external controller and the ADC.
1. First, set register bit <SERIAL READOUT> = 1. This also disables any further writes into the registers.
2. Initiate a serial interface cycle specifying the address of the register (A7-A0) whose content has to be read.
3. The device outputs the contents (D7-D0) of the selected register on the SDOUT pin.
4. The external controller can latch the contents at the falling edge of SCLK.
5. To enable register writes, reset register bit <SERIAL READOUT> = 0.
The serial register readout works only with CMOS interface; with LVDS interface, pin 56 functions as CLKOUTM.
When <SERIAL READOUT> is disabled, SDOUT pin is forced low or high by the device (and not put in
high-impedance). If serial readout is not used, SDOUT pin must be floated.
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Product Folder Link(s): ADS62P45, ADS62P44 ADS62P43, ADS62P42