Datasheet

CLKOUTCLKOUT
Output
data
Output
Data
t
su
t
su
Dn *
t
h
t
h
Dn
DAn,DBn
t
PDI
t
PDI
CLKMCLKM
CLKPCLKP
Output
clock
Output
Clock
Input
clock
Input
Clock
*Dn-BitsD0,D1,D2,...ofChannels A &B
Output
data
Output
Data
t
su
t
DV
Dn *
Dn
DAn,DBn
t
PDI
t
START
CLKMCLKM
CLKPCLKP
Input
clock
Input
Clock
*Dn-BitsD0,D1,D2,...
Output
data
Output
Data
t
su
t
DV_CHA
<CHA_Dn>
*
Dn
Pin
DBn
t
PDI
t
START_CHA
CLKM
CLKP
CLKPCLKM
Input
clock
Input
Clock
t
su
t
DV_CHB
t
PDI
t
START_CHB
<CHB_Dn>
*
ADS62P45, ADS62P44
ADS62P43, ADS62P42
SLAS561C –JULY 2007– REVISED FEBRUARY 2012 www.ti.com
Figure 3. CMOS Mode Timing
Figure 4. Multiplexed Mode Timing (CMOS only)
12 Submit Documentation Feedback Copyright © 2007–2012, Texas Instruments Incorporated
Product Folder Link(s): ADS62P45, ADS62P44 ADS62P43, ADS62P42