Datasheet

DCLK_M DCLK_P FCLK_M FCLK_P
FPGA_PDNB FPGA_SCLK FPGA_SDATA FPGA_SEN
DB0_M DB0_P DB1_M DB1_P DA0_M DA0_P DA1_M DA1_P
FPGA_RST FPGA_PDNA
FD3
SMT FIDUCIAL
FD3
SMT FIDUCIAL
FD2
SMT FIDUCIAL
FD2
SMT FIDUCIAL
FD1
SMT FIDUCIAL
FD1
SMT FIDUCIAL
J15
CONN_QTH_30X2-D-A
J15
CONN_QTH_30X2-D-A
2 4 6 8
10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 G1
G2
G3
G4
G5
G6
G7
G8
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
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81
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83
84
85
86
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90
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104
105
106
107
108
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110
111
112
113
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119
120
S005
www.ti.com Physical Description
Figure 14. Sheet 5 of 5
SLAU197B – April 2007 – Revised July 2009 25
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