Datasheet

1 Overview
1.1 ADS62xxEVM Quick-Start Procedure
User's Guide
SLAU197B – April 2007 – Revised July 2009
This user's guide gives a general overview of the evaluation module (EVM) and provides a general
description of the features and functions to be considered while using this module. This manual is
applicable to the ADS6245, ADS6244, ADS6243, ADS6225, ADS6224, and ADS6223, which collectively
are referred to as ADS62xx. The ADS62xxEVM provides a platform for evaluating the dual-channel
ADS62xx 14- and 12-bit analog-to-digital converters (ADC) under various signal, reference, and supply
conditions. In certain instances, the user's guide may offer directions for only the 14-bit ADC family, which
is referred to as the ADS624x, or only the 12-bit ADC family, which is referred to as the ADS622x. In
addition, this user's guide explains the procedure for hooking up the ADS62xxEVM to TI's high-speed
LVDS deserializer and capture card, the TSW1200.
This document must be used in combination with the respective ADC data sheet.
Using the quick-start procedure, many users can begin evaluating the ADC in a minimal amount of time.
The quick-start procedure includes details on how to set up the ADS62xxEVM used along with TI's
high-speed LVDS deserializer. A complete listing of all EVM features follows in Section 2 . The quick-start
instructions are delineated as ADS62xx, which refers to instructions pertaining to the ADC EVM; or
TSW1200, which refers to instructions pertaining to the high-speed LVDS deserializer.
1. ADS62xx: Verify all jumper settings against the schematic jumper list in Table 1 :
Table 1. Three-Pin Jumper List
JUMPER FUNCTION ADS624x DEFAULT ADS622x DEFAULT
J17 Sets ADC coarse gain mode and ADC reference mode. Use 0-dB gain, internal 0-dB gain, internal
silkscreen for configuration. references references
J20
(1)
Sets ADC output mode to either 1-wire, 2-wire, SDR, or DDR. DDR, 2-wire DDR, 2-wire
Use silkscreen for configuration.
J18
(1)
Sets ADC output serialization to either 14x or 16x and sets 16x, rising edge 14x, rising edge
(2)
data formatting to rising edge or falling edge when the ADC is
used in SDR mode. Use silkscreen for configuration.
J19
(1)
This is an ADC reserved pin and must always be set to divide Divide by 1 Divide by 1
by 1.
J21
(1)
Selects the data output format as MSB- or LSB-first and MSB-first, offset binary MSB-first, offset binary
2s-complement or offset-binary.
(1)
Although the ADS62xx supports many different output formats, for customers using the TSW1200 data capture card for ADC
evaluation, one must leave these jumpers in their default condition. The TSW1200 is programmed to only accept one specific
output format that the ADS62xx offers.
(2)
The silkscreen on the EVM only refers to the modes of the ADS624x. When an ADS622x, or 12-bit ADC, is being evaluated, the
silkscreen 14x refers to the 12x serialization mode and the silkscreen 16x refers to the 14x serialization mode.
2. ADS62xx: Connect 3.3-Vdc supplies to P1 and P3, with the returns to P2 and P4, respectively. The
grounds can be shorted together.
3. TSW1200: Connect 5 Vdc to J15 and the return to J14.
4. TSW1200: If evaluating the 12-bit ADC, or ADS622x, verify that jumper J11 is set to short pins 1–2,
which configures the FPGA for deserialization of a 12-bit ADC serial data stream. On J11, short pins
2–3 for evaluating an ADS624xEVM.
5. Connect the two boards together by connecting J9 on the TSW1200 circuit board to J15 of the
ADS62xxEVM.
6. ADS62xx and TSW1200: Switch power supplies on.
SLAU197B – April 2007 – Revised July 2009 5
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