Datasheet

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f
IN
− Input Frequency − MHz
−7
−6
−5
−4
−3
−2
−1
0
1
0 100 200 300 400 500 600
Magnitude − dB
G080
Drive Circuit Requirements
f − Frequency − MHz
0 100 200 300 400 500 600
R − Resistance − kΩ
100
10
0.1
0.01
G083
1
ADS6145, ADS6144
ADS6143, ADS6142
SLWS198B – JULY 2007 – REVISED MARCH 2008
Figure 93. ADC Analog Input Bandwidth
For optimum performance, the analog inputs must be driven differentially. This improves the common-mode
noise immunity and even-order harmonic rejection.
A 5- Ω resistor in series with each input pin is recommended to damp out ringing caused by the package
parasitics. It is also necessary to present low impedance (< 50 Ω ) for the common-mode switching currents. For
example, this is achieved by using two resistors from each input terminated to the common-mode voltage (VCM).
In addition to the above, the drive circuit may have to be designed to provide a low insertion loss over the
desired frequency range and matched impedance to the source. While doing this, the ADC input impedance (Zin)
must be considered. Over a wide frequency range, the input impedance can be approximated by a parallel
combination of Rin and Cin (Zin = Rin||Cin).
Figure 94. ADC Input Resistance, Rin
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Product Folder Link(s): ADS6145, ADS6144 ADS6143, ADS6142