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Input Amplitude − dBFS
30
40
50
60
70
80
90
100
110
−60 −50 −40 −30 −20 −10 0
f
IN
= 20.1 MHz
SFDR − dBc, dBFS
G068
SFDR (dBc)
SFDR (dBFS)
SNR (dBFS)
50
55
60
65
70
75
80
85
90
SNR − dBFS
SNR − dBFS
72
73
74
75
76
77
78
T − Temperature − °C
86
88
90
92
94
96
98
−40 −20 0 20 40 60 80
SFDR − dBc
G067
f
IN
= 10.1 MHz
SNR
SFDR
80
82
84
86
88
90
92
94
96
0.5 1.0 1.5 2.0 2.5 3.0
SFDR − dBc
Input Clock Amplitude − V
PP
G069
SNR
SFDR
f
IN
= 20.1 MHz
SNR − dBFS
72
73
74
75
76
77
78
79
80
SNR − dBFS
70
71
72
73
74
75
76
77
Input Clock Duty Cycle − %
70
74
78
82
86
90
94
98
30 35 40 45 50 55 60 65 70
SFDR − dBc
G070
SNR
SFDR
f
IN
= 10.1 MHz
SNR − dBFS
72
74
76
78
80
82
V
VCM
− VCM Voltage − V
85
87
89
91
93
95
1.30 1.35 1.40 1.45 1.50 1.55 1.60 1.65 1.70
SFDR − dBc
G072
f
IN
= 20.1 MHz
External Reference Mode
SNR
SFDR
Output Code
0
5
10
15
20
25
30
35
40
8202 8203 8204 8205 8206 8207 8208 8209 8210 8211
Occurence − %
G071
RMS (LSB) = 1.041
ADS6145, ADS6144
ADS6143, ADS6142
SLWS198B – JULY 2007 – REVISED MARCH 2008
TYPICAL CHARACTERISTICS - ADS6142 (F
S
= 65 MSPS) (continued)
All plots are at 25 ° C, AVDD = DRVDD = 3.3 V, maximum rated sampling frequency, sine wave input clock, 1.5 V
PP
differential
clock amplitude, 50% clock duty cycle, – 1 dBFS differential analog input, internal reference mode, 0 dB gain, CMOS output
interface (unless otherwise noted)
PERFORMANCE vs TEMPERATURE PERFORMANCE vs INPUT AMPLITUDE
Figure 75. Figure 76.
PERFORMANCE vs CLOCK AMPLITUDE PERFORMANCE vs INPUT CLOCK DUTY CYCLE
Figure 77. Figure 78.
OUTPUT NOISE HISTOGRAM WITH
INPUTS TIED TO COMMON-MODE PERFORMANCE IN EXTERNAL REFERENCE MODE
Figure 79. Figure 80.
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Product Folder Link(s): ADS6145, ADS6144 ADS6143, ADS6142